* [PATCH v9 1/4] dt-bindings: mfd: Add AAEON embedded controller
2026-10-29 14:48 [PATCH v9 0/4] Add support for AAEON SRG-IMX8P MCU Thomas Perrot (Schneider Electric)
@ 2026-10-29 14:48 ` Thomas Perrot (Schneider Electric)
2026-10-29 14:57 ` sashiko-bot
2026-10-29 14:48 ` [PATCH v9 2/4] mfd: aaeon: Add SRG-IMX8P MCU driver Thomas Perrot (Schneider Electric)
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Thomas Perrot (Schneider Electric) @ 2026-10-29 14:48 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam,
Jérémie Dautheribes, Wim Van Sebroeck, Guenter Roeck,
Lee Jones, Frank Li
Cc: devicetree, linux-kernel, linux-gpio, imx, linux-arm-kernel,
linux-watchdog, Thomas Petazzoni, Miquel Raynal, mfd,
Thomas Perrot (Schneider Electric), Conor Dooley
Add device tree binding documentation for the AAEON embedded controller
(MCU). This microcontroller is found on AAEON embedded boards, it is
connected via I2C and provides GPIO control and a watchdog timer.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thomas Perrot (Schneider Electric) <thomas.perrot@bootlin.com>
---
.../bindings/mfd/aaeon,srg-imx8p-mcu.yaml | 69 ++++++++++++++++++++++
MAINTAINERS | 6 ++
2 files changed, 75 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml b/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
new file mode 100644
index 000000000000..74dccee4310a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/aaeon,srg-imx8p-mcu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AAEON Embedded Controller
+
+maintainers:
+ - Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
+ - Thomas Perrot <thomas.perrot@bootlin.com>
+
+description:
+ AAEON embeds a microcontroller on Standard RISC Gateway with ARM i.MX8M Plus
+ Quad-Core boards providing GPIO control and watchdog timer.
+
+ This MCU is connected via I2C bus.
+
+ Its GPIO controller provides 7 GPOs and 12 GPIOs.
+
+ Its watchdog has a fixed hardware heartbeat of 25 seconds that cannot be
+ changed. Longer timeouts, 240 seconds by default, are supported through
+ automatic pinging by the watchdog core.
+
+properties:
+ compatible:
+ const: aaeon,srg-imx8p-mcu
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-line-names:
+ minItems: 1
+ maxItems: 19
+
+ timeout-sec: true
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - "#gpio-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ embedded-controller@62 {
+ compatible = "aaeon,srg-imx8p-mcu";
+ reg = <0x62>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "gpo-1", "gpo-2", "gpo-3", "gpo-4",
+ "gpo-5", "gpo-6", "gpo-7",
+ "gpio-1", "gpio-2", "gpio-3", "gpio-4",
+ "gpio-5", "gpio-6", "gpio-7", "gpio-8",
+ "gpio-9", "gpio-10", "gpio-11", "gpio-12";
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 03649f08c7c7..3f85e2a8b192 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -187,6 +187,12 @@ W: http://www.adaptec.com/
F: Documentation/scsi/aacraid.rst
F: drivers/scsi/aacraid/
+AAEON SRG-IMX8P CONTROLLER MFD DRIVER
+M: Thomas Perrot <thomas.perrot@bootlin.com>
+R: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
+S: Maintained
+F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
+
AAEON UPBOARD FPGA MFD DRIVER
M: Thomas Richard <thomas.richard@bootlin.com>
S: Maintained
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v9 1/4] dt-bindings: mfd: Add AAEON embedded controller
2026-10-29 14:48 ` [PATCH v9 1/4] dt-bindings: mfd: Add AAEON embedded controller Thomas Perrot (Schneider Electric)
@ 2026-10-29 14:57 ` sashiko-bot
0 siblings, 0 replies; 7+ messages in thread
From: sashiko-bot @ 2026-10-29 14:57 UTC (permalink / raw)
To: Thomas Perrot (Schneider Electric)
Cc: devicetree, linux-gpio, imx, linux-watchdog, mfd, robh, conor+dt,
Frank.Li, lee
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: mfd: undocumented aaeon vendor prefix for aaeon,srg-imx8p-mcu
--
commit 803bf7ce3719e9dd00495c829416f770a3edc092
Author: Thomas Perrot (Schneider Electric) <thomas.perrot@bootlin.com>
dt-bindings: mfd: Add AAEON embedded controller
This commit adds the device tree binding documentation and MAINTAINERS entry
for the I2C-connected AAEON embedded controller (MCU), which provides GPIO
control and a watchdog timer on AAEON boards.
> diff --git a/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml b/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
> new file mode 100644
> index 0000000000000..74dccee4310a9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
> @@ -0,0 +1,69 @@
[ ... ]
> +properties:
> + compatible:
> + const: aaeon,srg-imx8p-mcu
[Severity: Low]
Does the "aaeon" vendor prefix need to be documented in
Documentation/devicetree/bindings/vendor-prefixes.yaml as well?
In Documentation/devicetree/bindings/vendor-prefixes.yaml under
patternProperties:
"^9tripod,.*":
description: Shenzhen 9Tripod Innovation and Development CO., LTD.
"^abb,.*":
description: ABB
there is no "^aaeon,.*" entry yet, which causes make dt_binding_check
(via dt-doc-validate) to fail on
Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml and
scripts/checkpatch.pl to report an undocumented DT compatible vendor prefix.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261029-dev-b4-aaeon-mcu-driver-v9-0-f9b6d0cc180d@bootlin.com?part=1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v9 2/4] mfd: aaeon: Add SRG-IMX8P MCU driver
2026-10-29 14:48 [PATCH v9 0/4] Add support for AAEON SRG-IMX8P MCU Thomas Perrot (Schneider Electric)
2026-10-29 14:48 ` [PATCH v9 1/4] dt-bindings: mfd: Add AAEON embedded controller Thomas Perrot (Schneider Electric)
@ 2026-10-29 14:48 ` Thomas Perrot (Schneider Electric)
2026-10-29 14:48 ` [PATCH v9 3/4] gpio: aaeon: Add GPIO driver for SRG-IMX8P MCU Thomas Perrot (Schneider Electric)
2026-10-29 14:48 ` [PATCH v9 4/4] watchdog: aaeon: Add watchdog " Thomas Perrot (Schneider Electric)
3 siblings, 0 replies; 7+ messages in thread
From: Thomas Perrot (Schneider Electric) @ 2026-10-29 14:48 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam,
Jérémie Dautheribes, Wim Van Sebroeck, Guenter Roeck,
Lee Jones, Frank Li
Cc: devicetree, linux-kernel, linux-gpio, imx, linux-arm-kernel,
linux-watchdog, Thomas Petazzoni, Miquel Raynal, mfd,
Thomas Perrot (Schneider Electric)
Add a driver for the Aaeon SRG-IMX8P embedded controller. This driver
provides the core I2C communication interface and registers child
devices (GPIO and watchdog controllers).
The driver implements a custom regmap bus over I2C to match the MCU's
fixed 3-byte command format [opcode, arg, value]. Register addresses
are encoded as 16-bit values (opcode << 8 | arg) using the
AAEON_MCU_REG() macro defined in the shared header. The regmap
instance is shared with child drivers via dev_get_regmap(). Concurrent
I2C accesses from child drivers are serialized by regmap's built-in
locking.
The MCU wants a STOP between a command and its response, so they are
two separate transfers. Both are issued under the I2C segment lock so
that no other transfer on the same I2C segment can land in between.
I2C transfers use heap-allocated DMA-safe buffers rather than
stack-allocated ones, as required by I2C controllers that perform DMA.
Regmap caching is enabled (REGCACHE_MAPLE) with a volatile_reg
callback that marks GPIO input read registers (opcode 0x72) and the
watchdog status register (opcode 0x63, arg 0x02) as volatile. All
other registers written by the driver (GPIO direction,
GPO state, watchdog control) are stable and can be safely cached.
Only those two kinds of registers are readable. Any other opcode is a
command, and the frame sent for a read is the same as the one used to
write it, so reading it, for instance through the regmap debugfs
registers file, would execute the command.
Co-developed-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>
Signed-off-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>
Signed-off-by: Thomas Perrot (Schneider Electric) <thomas.perrot@bootlin.com>
---
MAINTAINERS | 2 +
drivers/mfd/Kconfig | 11 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/aaeon-mcu.c | 221 ++++++++++++++++++++++++++++++++++++++++++
include/linux/mfd/aaeon-mcu.h | 40 ++++++++
5 files changed, 275 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3f85e2a8b192..55fc12c283fa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -192,6 +192,8 @@ M: Thomas Perrot <thomas.perrot@bootlin.com>
R: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
S: Maintained
F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
+F: drivers/mfd/aaeon-mcu.c
+F: include/linux/mfd/aaeon-mcu.h
AAEON UPBOARD FPGA MFD DRIVER
M: Thomas Richard <thomas.richard@bootlin.com>
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 87ed55c155f0..72bca7026cee 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1581,6 +1581,17 @@ config ABX500_CORE
remain unchanged when IC changes. Binding of the functions to
actual register access is done by the IC core driver.
+config MFD_AAEON_MCU
+ tristate "Aaeon SRG-IMX8P MCU Driver"
+ depends on I2C
+ select MFD_CORE
+ select REGMAP
+ help
+ Select this option to enable support for the Aaeon SRG-IMX8P
+ onboard microcontroller (MCU). This driver provides the core
+ functionality to communicate with the MCU over I2C. The MCU
+ provides GPIO and watchdog functionality.
+
config AB8500_CORE
bool "ST-Ericsson AB8500 Mixed Signal Power Management chip"
depends on ABX500_CORE && MFD_DB8500_PRCMU
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index f8101d2a9ce9..166b25638f7f 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_MFD_88PM860X) += 88pm860x.o
obj-$(CONFIG_MFD_88PM800) += 88pm800.o 88pm80x.o
obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o
obj-$(CONFIG_MFD_88PM886_PMIC) += 88pm886.o
+obj-$(CONFIG_MFD_AAEON_MCU) += aaeon-mcu.o
obj-$(CONFIG_MFD_ACT8945A) += act8945a.o
obj-$(CONFIG_MFD_SM501) += sm501.o
obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o
diff --git a/drivers/mfd/aaeon-mcu.c b/drivers/mfd/aaeon-mcu.c
new file mode 100644
index 000000000000..e7470023265d
--- /dev/null
+++ b/drivers/mfd/aaeon-mcu.c
@@ -0,0 +1,221 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Aaeon MCU driver
+ *
+ * Copyright (C) 2026 Bootlin
+ * Author: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
+ * Author: Thomas Perrot <thomas.perrot@bootlin.com>
+ */
+
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/mfd/aaeon-mcu.h>
+#include <linux/mfd/core.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+struct aaeon_mcu {
+ struct i2c_client *client;
+ u8 *cmd; /* DMA-safe 3-byte write buffer [opcode, arg, value] */
+ u8 *response; /* DMA-safe 1-byte read buffer for MCU acknowledgment */
+};
+
+static const struct mfd_cell aaeon_mcu_devs[] = {
+ MFD_CELL_BASIC("aaeon-mcu-wdt", NULL, NULL, 0, 0),
+ MFD_CELL_BASIC("aaeon-mcu-gpio", NULL, NULL, 0, 0),
+};
+
+/* Number of bytes in a MCU command: [opcode, arg, value] */
+#define AAEON_MCU_CMD_LEN 3
+
+/*
+ * Custom regmap bus for the Aaeon MCU I2C protocol.
+ *
+ * The MCU uses a fixed 3-byte command format [opcode, arg, value] followed
+ * by a 1-byte response. It requires a STOP condition between the command
+ * write and the response read, so two separate transfers are issued. The
+ * I2C segment lock is held across both so that no other transfer on the
+ * same I2C segment can land between the command and its response. The
+ * regmap lock serialises concurrent accesses from the GPIO and watchdog
+ * child drivers.
+ *
+ * Register addresses are encoded as a 16-bit big-endian value where the
+ * high byte is the opcode and the low byte is the argument, matching the
+ * wire layout produced by regmap for reg_bits=16.
+ */
+
+/*
+ * Send the command held in mcu->cmd and read the 1-byte response into
+ * mcu->response. Both buffers are heap-allocated and thus DMA-safe.
+ */
+static int aaeon_mcu_xfer(struct aaeon_mcu *mcu)
+{
+ struct i2c_adapter *adap = mcu->client->adapter;
+ struct i2c_msg msg = {
+ .addr = mcu->client->addr,
+ .flags = I2C_M_DMA_SAFE,
+ .buf = mcu->cmd,
+ .len = AAEON_MCU_CMD_LEN,
+ };
+ int ret;
+
+ i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
+
+ ret = __i2c_transfer(adap, &msg, 1);
+ if (ret == 1) {
+ msg.flags = I2C_M_RD | I2C_M_DMA_SAFE;
+ msg.buf = mcu->response;
+ msg.len = 1;
+ ret = __i2c_transfer(adap, &msg, 1);
+ }
+
+ i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
+
+ if (ret < 0)
+ return ret;
+
+ return ret == 1 ? 0 : -EIO;
+}
+
+static int aaeon_mcu_regmap_write(void *context, const void *data, size_t count)
+{
+ struct aaeon_mcu *mcu = context;
+
+ /*
+ * use_single_write guarantees one register per call: a 2-byte
+ * address followed by a 1-byte value.
+ */
+ if (count != AAEON_MCU_CMD_LEN)
+ return -EINVAL;
+
+ memcpy(mcu->cmd, data, count);
+
+ /* The MCU always sends a response byte after each command; discard it. */
+ return aaeon_mcu_xfer(mcu);
+}
+
+static int aaeon_mcu_regmap_read(void *context, const void *reg_buf,
+ size_t reg_size, void *val_buf, size_t val_size)
+{
+ struct aaeon_mcu *mcu = context;
+ int ret;
+
+ /*
+ * reg_buf holds the 2-byte big-endian register address [opcode, arg].
+ * Append a trailing 0x00 to form the full 3-byte MCU command.
+ */
+ mcu->cmd[0] = ((u8 *)reg_buf)[0];
+ mcu->cmd[1] = ((u8 *)reg_buf)[1];
+ mcu->cmd[2] = 0x00;
+
+ ret = aaeon_mcu_xfer(mcu);
+ if (ret)
+ return ret;
+
+ /*
+ * val_buf is owned by the regmap caller and is not necessarily
+ * DMA-safe, so go through the driver's response buffer.
+ * use_single_read guarantees val_size == 1.
+ */
+ *(u8 *)val_buf = *mcu->response;
+
+ return 0;
+}
+
+static const struct regmap_bus aaeon_mcu_regmap_bus = {
+ .write = aaeon_mcu_regmap_write,
+ .read = aaeon_mcu_regmap_read,
+};
+
+static bool aaeon_mcu_volatile_reg(struct device *dev, unsigned int reg)
+{
+ /*
+ * GPIO input registers are driven by external signals and can change
+ * at any time without CPU involvement, always read from hardware.
+ *
+ * The watchdog status register reflects hardware state and can change
+ * autonomously.
+ *
+ * All other registers are written by the driver and their values are
+ * stable, so they can be safely cached.
+ */
+ if ((reg >> 8) == AAEON_MCU_READ_GPIO_OPCODE)
+ return true;
+ if (reg == AAEON_MCU_REG(AAEON_MCU_CONTROL_WDT_OPCODE, 0x02))
+ return true;
+ return false;
+}
+
+static bool aaeon_mcu_readable_reg(struct device *dev, unsigned int reg)
+{
+ /*
+ * Every opcode but the GPIO input read and the watchdog status is a
+ * command: the frame sent for a read is identical to the one used to
+ * write it, so reading such a register would execute the command.
+ * Only the registers reflecting hardware state may be read.
+ */
+ return aaeon_mcu_volatile_reg(dev, reg);
+}
+
+static const struct regmap_config aaeon_mcu_regmap_config = {
+ .reg_bits = 16,
+ .val_bits = 8,
+ .reg_format_endian = REGMAP_ENDIAN_BIG,
+ .max_register = AAEON_MCU_MAX_REGISTER,
+ .readable_reg = aaeon_mcu_readable_reg,
+ .volatile_reg = aaeon_mcu_volatile_reg,
+ .cache_type = REGCACHE_MAPLE,
+ .use_single_write = true,
+ .use_single_read = true,
+};
+
+static int aaeon_mcu_probe(struct i2c_client *client)
+{
+ struct aaeon_mcu *ddata;
+ struct regmap *regmap;
+
+ ddata = devm_kzalloc(&client->dev, sizeof(*ddata), GFP_KERNEL);
+ if (!ddata)
+ return -ENOMEM;
+
+ ddata->client = client;
+
+ ddata->cmd = devm_kcalloc(&client->dev, AAEON_MCU_CMD_LEN, sizeof(*ddata->cmd),
+ GFP_KERNEL);
+ if (!ddata->cmd)
+ return -ENOMEM;
+
+ ddata->response = devm_kzalloc(&client->dev, sizeof(*ddata->response), GFP_KERNEL);
+ if (!ddata->response)
+ return -ENOMEM;
+
+ regmap = devm_regmap_init(&client->dev, &aaeon_mcu_regmap_bus,
+ ddata, &aaeon_mcu_regmap_config);
+ if (IS_ERR(regmap))
+ return dev_err_probe(&client->dev, PTR_ERR(regmap),
+ "failed to initialize regmap\n");
+
+ return devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_AUTO,
+ aaeon_mcu_devs, ARRAY_SIZE(aaeon_mcu_devs),
+ NULL, 0, NULL);
+}
+
+static const struct of_device_id aaeon_mcu_of_match[] = {
+ { .compatible = "aaeon,srg-imx8p-mcu" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, aaeon_mcu_of_match);
+
+static struct i2c_driver aaeon_mcu_driver = {
+ .driver = {
+ .name = "aaeon-mcu",
+ .of_match_table = aaeon_mcu_of_match,
+ },
+ .probe = aaeon_mcu_probe,
+};
+module_i2c_driver(aaeon_mcu_driver);
+
+MODULE_DESCRIPTION("Aaeon MCU Driver");
+MODULE_AUTHOR("Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/mfd/aaeon-mcu.h b/include/linux/mfd/aaeon-mcu.h
new file mode 100644
index 000000000000..3a1aeec85d60
--- /dev/null
+++ b/include/linux/mfd/aaeon-mcu.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Aaeon MCU driver definitions
+ *
+ * Copyright (C) 2026 Bootlin
+ * Author: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
+ * Author: Thomas Perrot <thomas.perrot@bootlin.com>
+ */
+
+#ifndef __LINUX_MFD_AAEON_MCU_H
+#define __LINUX_MFD_AAEON_MCU_H
+
+/*
+ * MCU register address: the high byte is the command opcode, the low
+ * byte is the argument. This matches the 3-byte wire format
+ * [opcode, arg, value] used by the MCU I2C protocol.
+ */
+#define AAEON_MCU_REG(op, arg) (((op) << 8) | (arg))
+
+/*
+ * Opcode for GPIO input reads. These registers are volatile, their values
+ * are driven by external signals and can change without CPU involvement.
+ * Used by the MFD driver's volatile_reg callback to bypass the regmap cache.
+ */
+#define AAEON_MCU_READ_GPIO_OPCODE 0x72
+
+/*
+ * Opcode for watchdog control and status commands.
+ * The status register (arg=0x02) reflects hardware state and is volatile.
+ */
+#define AAEON_MCU_CONTROL_WDT_OPCODE 0x63
+
+/*
+ * Highest register address in the MCU register map.
+ * The WRITE_GPIO opcode (0x77) with the highest GPIO argument (0x0B = 11,
+ * i.e. MAX_GPIOS - 1) produces the largest encoded address.
+ */
+#define AAEON_MCU_MAX_REGISTER AAEON_MCU_REG(0x77, 0x0B)
+
+#endif /* __LINUX_MFD_AAEON_MCU_H */
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v9 3/4] gpio: aaeon: Add GPIO driver for SRG-IMX8P MCU
2026-10-29 14:48 [PATCH v9 0/4] Add support for AAEON SRG-IMX8P MCU Thomas Perrot (Schneider Electric)
2026-10-29 14:48 ` [PATCH v9 1/4] dt-bindings: mfd: Add AAEON embedded controller Thomas Perrot (Schneider Electric)
2026-10-29 14:48 ` [PATCH v9 2/4] mfd: aaeon: Add SRG-IMX8P MCU driver Thomas Perrot (Schneider Electric)
@ 2026-10-29 14:48 ` Thomas Perrot (Schneider Electric)
2026-10-29 14:48 ` [PATCH v9 4/4] watchdog: aaeon: Add watchdog " Thomas Perrot (Schneider Electric)
3 siblings, 0 replies; 7+ messages in thread
From: Thomas Perrot (Schneider Electric) @ 2026-10-29 14:48 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam,
Jérémie Dautheribes, Wim Van Sebroeck, Guenter Roeck,
Lee Jones, Frank Li
Cc: devicetree, linux-kernel, linux-gpio, imx, linux-arm-kernel,
linux-watchdog, Thomas Petazzoni, Miquel Raynal, mfd,
Thomas Perrot (Schneider Electric), Bartosz Golaszewski
Add GPIO driver for the Aaeon SRG-IMX8P embedded controller. This
driver supports 7 GPO (General Purpose Output) pins and 12 GPIO pins
that can be configured as inputs or outputs.
The driver implements proper state management for GPO pins (which are
output-only) and full direction control for GPIO pins. During probe,
all pins are reset to a known state (GPOs low, GPIOs as inputs) to
prevent undefined behavior across system reboots, as the MCU does not
reset GPIO states on soft reboot.
Co-developed-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>
Signed-off-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Thomas Perrot (Schneider Electric) <thomas.perrot@bootlin.com>
---
MAINTAINERS | 1 +
drivers/gpio/Kconfig | 9 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-aaeon-mcu.c | 230 ++++++++++++++++++++++++++++++++++++++++++
4 files changed, 241 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 55fc12c283fa..4844d50327c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -192,6 +192,7 @@ M: Thomas Perrot <thomas.perrot@bootlin.com>
R: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
S: Maintained
F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
+F: drivers/gpio/gpio-aaeon-mcu.c
F: drivers/mfd/aaeon-mcu.c
F: include/linux/mfd/aaeon-mcu.h
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 55e4280029d8..79285fbc061a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1346,6 +1346,15 @@ endmenu
menu "MFD GPIO expanders"
+config GPIO_AAEON_MCU
+ tristate "Aaeon MCU GPIO support"
+ depends on MFD_AAEON_MCU
+ help
+ Select this option to enable GPIO support for the Aaeon SRG-IMX8P
+ onboard MCU. This driver provides access to GPIO pins and GPO
+ (General Purpose Output) pins controlled by the microcontroller.
+ The driver handles both input and output configuration.
+
config GPIO_ADP5520
tristate "GPIO Support for ADP5520 PMIC"
depends on PMIC_ADP5520
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 88f748846e60..a0adacd94065 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o
obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o
obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o
obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o
+obj-$(CONFIG_GPIO_AAEON_MCU) += gpio-aaeon-mcu.o
obj-$(CONFIG_GPIO_AD7768) += gpio-ad7768.o
obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o
obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o
diff --git a/drivers/gpio/gpio-aaeon-mcu.c b/drivers/gpio/gpio-aaeon-mcu.c
new file mode 100644
index 000000000000..a9e048c865f5
--- /dev/null
+++ b/drivers/gpio/gpio-aaeon-mcu.c
@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Aaeon MCU GPIO driver
+ *
+ * Copyright (C) 2026 Bootlin
+ * Author: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
+ * Author: Thomas Perrot <thomas.perrot@bootlin.com>
+ */
+
+#include <linux/bitops.h>
+#include <linux/gpio/driver.h>
+#include <linux/mfd/aaeon-mcu.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define AAEON_MCU_CONFIG_GPIO_INPUT 0x69
+#define AAEON_MCU_CONFIG_GPIO_OUTPUT 0x6F
+#define AAEON_MCU_READ_GPIO 0x72
+#define AAEON_MCU_WRITE_GPIO 0x77
+
+#define AAEON_MCU_CONTROL_GPO 0x6C
+
+#define MAX_GPIOS 12
+#define MAX_GPOS 7
+
+struct aaeon_mcu_gpio {
+ struct gpio_chip gc;
+ struct regmap *regmap;
+ DECLARE_BITMAP(dir_in, MAX_GPOS + MAX_GPIOS);
+ DECLARE_BITMAP(gpo_state, MAX_GPOS);
+};
+
+static int aaeon_mcu_gpio_config_input_cmd(struct aaeon_mcu_gpio *data,
+ unsigned int offset)
+{
+ return regmap_write(data->regmap,
+ AAEON_MCU_REG(AAEON_MCU_CONFIG_GPIO_INPUT, offset - 7),
+ 0);
+}
+
+static int aaeon_mcu_gpo_set_cmd(struct aaeon_mcu_gpio *data, unsigned int offset, int value)
+{
+ return regmap_write(data->regmap,
+ AAEON_MCU_REG(AAEON_MCU_CONTROL_GPO, offset + 1),
+ !!value);
+}
+
+static int aaeon_mcu_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
+{
+ struct aaeon_mcu_gpio *data = gpiochip_get_data(gc);
+ int ret;
+
+ if (offset < MAX_GPOS) {
+ dev_err(gc->parent,
+ "offset %d is a GPO (output-only) pin, cannot be configured as input\n",
+ offset);
+ return -EOPNOTSUPP;
+ }
+
+ ret = aaeon_mcu_gpio_config_input_cmd(data, offset);
+ if (ret < 0)
+ return ret;
+
+ set_bit(offset, data->dir_in);
+
+ return 0;
+}
+
+static int aaeon_mcu_gpio_config_output_cmd(struct aaeon_mcu_gpio *data,
+ unsigned int offset,
+ int value)
+{
+ int ret;
+
+ ret = regmap_write(data->regmap,
+ AAEON_MCU_REG(AAEON_MCU_WRITE_GPIO, offset - 7),
+ !!value);
+ if (ret < 0)
+ return ret;
+
+ return regmap_write(data->regmap,
+ AAEON_MCU_REG(AAEON_MCU_CONFIG_GPIO_OUTPUT, offset - 7),
+ 0);
+}
+
+static int aaeon_mcu_gpio_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
+{
+ struct aaeon_mcu_gpio *data = gpiochip_get_data(gc);
+ int ret;
+
+ if (offset < MAX_GPOS) {
+ ret = aaeon_mcu_gpo_set_cmd(data, offset, value);
+ if (ret)
+ return ret;
+ assign_bit(offset, data->gpo_state, value);
+ return 0;
+ }
+
+ ret = aaeon_mcu_gpio_config_output_cmd(data, offset, value);
+ if (ret < 0)
+ return ret;
+
+ clear_bit(offset, data->dir_in);
+
+ return 0;
+}
+
+static int aaeon_mcu_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
+{
+ struct aaeon_mcu_gpio *data = gpiochip_get_data(gc);
+
+ return test_bit(offset, data->dir_in) ?
+ GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;
+}
+
+static int aaeon_mcu_gpio_get(struct gpio_chip *gc, unsigned int offset)
+{
+ struct aaeon_mcu_gpio *data = gpiochip_get_data(gc);
+ unsigned int rsp;
+ int ret;
+
+ if (offset < MAX_GPOS)
+ return test_bit(offset, data->gpo_state);
+
+ ret = regmap_read(data->regmap,
+ AAEON_MCU_REG(AAEON_MCU_READ_GPIO, offset - 7),
+ &rsp);
+ if (ret < 0)
+ return ret;
+
+ return rsp;
+}
+
+static int aaeon_mcu_gpio_set_cmd(struct aaeon_mcu_gpio *data, unsigned int offset, int value)
+{
+ return regmap_write(data->regmap,
+ AAEON_MCU_REG(AAEON_MCU_WRITE_GPIO, offset - 7),
+ !!value);
+}
+
+static int aaeon_mcu_gpio_set(struct gpio_chip *gc, unsigned int offset,
+ int value)
+{
+ struct aaeon_mcu_gpio *data = gpiochip_get_data(gc);
+ int ret;
+
+ if (offset >= MAX_GPOS)
+ return aaeon_mcu_gpio_set_cmd(data, offset, value);
+
+ ret = aaeon_mcu_gpo_set_cmd(data, offset, value);
+ if (ret)
+ return ret;
+ assign_bit(offset, data->gpo_state, value);
+ return 0;
+}
+
+static const struct gpio_chip aaeon_mcu_chip = {
+ .label = "gpio-aaeon-mcu",
+ .owner = THIS_MODULE,
+ .get_direction = aaeon_mcu_gpio_get_direction,
+ .direction_input = aaeon_mcu_gpio_direction_input,
+ .direction_output = aaeon_mcu_gpio_direction_output,
+ .get = aaeon_mcu_gpio_get,
+ .set = aaeon_mcu_gpio_set,
+ .base = -1,
+ .ngpio = MAX_GPOS + MAX_GPIOS,
+ .can_sleep = true,
+};
+
+static void aaeon_mcu_gpio_reset(struct aaeon_mcu_gpio *data, struct device *dev)
+{
+ unsigned int i;
+ int ret;
+
+ /* Reset all GPOs */
+ for (i = 0; i < MAX_GPOS; i++) {
+ ret = aaeon_mcu_gpo_set_cmd(data, i, 0);
+ if (ret < 0)
+ dev_warn(dev, "Failed to reset GPO %u state: %d\n", i, ret);
+ clear_bit(i, data->dir_in);
+ }
+
+ /* Reset all GPIOs */
+ for (i = MAX_GPOS; i < MAX_GPOS + MAX_GPIOS; i++) {
+ ret = aaeon_mcu_gpio_config_input_cmd(data, i);
+ if (ret < 0)
+ dev_warn(dev, "Failed to reset GPIO %u state: %d\n", i, ret);
+ set_bit(i, data->dir_in);
+ }
+}
+
+static int aaeon_mcu_gpio_probe(struct platform_device *pdev)
+{
+ struct aaeon_mcu_gpio *data;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!data->regmap)
+ return -ENODEV;
+
+ data->gc = aaeon_mcu_chip;
+ data->gc.parent = pdev->dev.parent;
+
+ /*
+ * Reset all GPIO states to a known configuration. The MCU does not
+ * reset GPIO state on soft reboot, only on power cycle (hard reboot).
+ * Without this reset, GPIOs would retain their previous state across
+ * reboots, which could lead to unexpected behavior.
+ */
+ aaeon_mcu_gpio_reset(data, &pdev->dev);
+
+ return devm_gpiochip_add_data(&pdev->dev, &data->gc, data);
+}
+
+static struct platform_driver aaeon_mcu_gpio_driver = {
+ .driver = {
+ .name = "aaeon-mcu-gpio",
+ },
+ .probe = aaeon_mcu_gpio_probe,
+};
+module_platform_driver(aaeon_mcu_gpio_driver);
+
+MODULE_ALIAS("platform:aaeon-mcu-gpio");
+MODULE_DESCRIPTION("GPIO interface for Aaeon MCU");
+MODULE_AUTHOR("Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>");
+MODULE_LICENSE("GPL");
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v9 4/4] watchdog: aaeon: Add watchdog driver for SRG-IMX8P MCU
2026-10-29 14:48 [PATCH v9 0/4] Add support for AAEON SRG-IMX8P MCU Thomas Perrot (Schneider Electric)
` (2 preceding siblings ...)
2026-10-29 14:48 ` [PATCH v9 3/4] gpio: aaeon: Add GPIO driver for SRG-IMX8P MCU Thomas Perrot (Schneider Electric)
@ 2026-10-29 14:48 ` Thomas Perrot (Schneider Electric)
2026-10-29 14:57 ` sashiko-bot
3 siblings, 1 reply; 7+ messages in thread
From: Thomas Perrot (Schneider Electric) @ 2026-10-29 14:48 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam,
Jérémie Dautheribes, Wim Van Sebroeck, Guenter Roeck,
Lee Jones, Frank Li
Cc: devicetree, linux-kernel, linux-gpio, imx, linux-arm-kernel,
linux-watchdog, Thomas Petazzoni, Miquel Raynal, mfd,
Thomas Perrot (Schneider Electric)
Add watchdog driver for the Aaeon SRG-IMX8P embedded controller,
which exposes the MCU's watchdog timer.
The MCU's hardware heartbeat is fixed at 25 seconds, so the watchdog
core pings the MCU in the background to provide the default timeout
of 240 seconds. The software timeout can be changed via the
WDIOC_SETTIMEOUT ioctl, the DT timeout-sec property of the MCU node,
or the timeout module parameter. As the hardware cannot expire earlier
than its heartbeat, timeouts below 25 seconds are rejected.
CONFIG_WATCHDOG_NOWAYOUT is honoured, so the watchdog cannot be stopped
once started when it is enabled.
Co-developed-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>
Signed-off-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>
Signed-off-by: Thomas Perrot (Schneider Electric) <thomas.perrot@bootlin.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
---
MAINTAINERS | 1 +
drivers/watchdog/Kconfig | 10 +++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/aaeon_mcu_wdt.c | 171 +++++++++++++++++++++++++++++++++++++++
4 files changed, 183 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4844d50327c8..d8bb162ddcff 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -194,6 +194,7 @@ S: Maintained
F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml
F: drivers/gpio/gpio-aaeon-mcu.c
F: drivers/mfd/aaeon-mcu.c
+F: drivers/watchdog/aaeon_mcu_wdt.c
F: include/linux/mfd/aaeon-mcu.h
AAEON UPBOARD FPGA MFD DRIVER
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index f7d0a0c2c0ef..9ffc2ade9bf0 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -449,6 +449,16 @@ config SL28CPLD_WATCHDOG
# ARM Architecture
+config AAEON_MCU_WATCHDOG
+ tristate "Aaeon MCU Watchdog"
+ depends on MFD_AAEON_MCU
+ select WATCHDOG_CORE
+ help
+ Select this option to enable watchdog timer support for the Aaeon
+ SRG-IMX8P onboard microcontroller (MCU). This driver provides
+ watchdog functionality through the MCU, allowing system monitoring
+ and automatic recovery from system hangs.
+
config AIROHA_WATCHDOG
tristate "Airoha EN7581 Watchdog"
depends on ARCH_AIROHA || COMPILE_TEST
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 9ac406677aba..09c07a29a2f4 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
# ALPHA Architecture
# ARM Architecture
+obj-$(CONFIG_AAEON_MCU_WATCHDOG) += aaeon_mcu_wdt.o
obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o
obj-$(CONFIG_ARM_SBSA_WATCHDOG) += sbsa_gwdt.o
obj-$(CONFIG_ARMADA_37XX_WATCHDOG) += armada_37xx_wdt.o
diff --git a/drivers/watchdog/aaeon_mcu_wdt.c b/drivers/watchdog/aaeon_mcu_wdt.c
new file mode 100644
index 000000000000..beded3d6326f
--- /dev/null
+++ b/drivers/watchdog/aaeon_mcu_wdt.c
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Aaeon MCU Watchdog driver
+ *
+ * Copyright (C) 2026 Bootlin
+ * Author: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
+ * Author: Thomas Perrot <thomas.perrot@bootlin.com>
+ */
+
+#include <linux/mfd/aaeon-mcu.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/watchdog.h>
+
+#define AAEON_MCU_PING_WDT 0x73
+
+#define AAEON_MCU_WDT_TIMEOUT 240
+#define AAEON_MCU_WDT_HEARTBEAT_MS 25000
+/* The MCU cannot expire earlier than its fixed heartbeat. */
+#define AAEON_MCU_WDT_MIN_TIMEOUT (AAEON_MCU_WDT_HEARTBEAT_MS / 1000)
+
+static unsigned int timeout;
+module_param(timeout, uint, 0);
+MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
+
+struct aaeon_mcu_wdt {
+ struct watchdog_device wdt;
+ struct regmap *regmap;
+};
+
+static int aaeon_mcu_wdt_cmd(struct aaeon_mcu_wdt *data, u8 opcode, u8 arg)
+{
+ return regmap_write(data->regmap, AAEON_MCU_REG(opcode, arg), 0);
+}
+
+static int aaeon_mcu_wdt_start(struct watchdog_device *wdt)
+{
+ struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt);
+
+ return aaeon_mcu_wdt_cmd(data, AAEON_MCU_CONTROL_WDT_OPCODE, 0x01);
+}
+
+static int aaeon_mcu_wdt_status(struct watchdog_device *wdt, bool *enabled)
+{
+ struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt);
+ unsigned int rsp;
+ int ret;
+
+ ret = regmap_read(data->regmap,
+ AAEON_MCU_REG(AAEON_MCU_CONTROL_WDT_OPCODE, 0x02),
+ &rsp);
+ if (ret)
+ return ret;
+
+ *enabled = rsp == 0x01;
+ return 0;
+}
+
+static int aaeon_mcu_wdt_stop(struct watchdog_device *wdt)
+{
+ struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt);
+
+ return aaeon_mcu_wdt_cmd(data, AAEON_MCU_CONTROL_WDT_OPCODE, 0x00);
+}
+
+static int aaeon_mcu_wdt_ping(struct watchdog_device *wdt)
+{
+ struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt);
+
+ return aaeon_mcu_wdt_cmd(data, AAEON_MCU_PING_WDT, 0x00);
+}
+
+static const struct watchdog_info aaeon_mcu_wdt_info = {
+ .identity = "Aaeon MCU Watchdog",
+ .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT
+};
+
+static const struct watchdog_ops aaeon_mcu_wdt_ops = {
+ .owner = THIS_MODULE,
+ .start = aaeon_mcu_wdt_start,
+ .stop = aaeon_mcu_wdt_stop,
+ .ping = aaeon_mcu_wdt_ping,
+};
+
+static int aaeon_mcu_wdt_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct watchdog_device *wdt;
+ struct aaeon_mcu_wdt *data;
+ bool enabled;
+ int ret;
+
+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->regmap = dev_get_regmap(dev->parent, NULL);
+ if (!data->regmap)
+ return -ENODEV;
+
+ wdt = &data->wdt;
+ wdt->parent = dev;
+ wdt->info = &aaeon_mcu_wdt_info;
+ wdt->ops = &aaeon_mcu_wdt_ops;
+ /*
+ * The MCU firmware has a fixed hardware timeout of 25 seconds that
+ * cannot be changed. The watchdog core handles automatic pinging to
+ * support software timeouts longer than the hardware limit. The default
+ * software timeout of 240 seconds can be overridden via the DT
+ * timeout-sec property of the MCU node or the timeout module
+ * parameter.
+ */
+ wdt->timeout = AAEON_MCU_WDT_TIMEOUT;
+ wdt->min_timeout = AAEON_MCU_WDT_MIN_TIMEOUT;
+ wdt->max_hw_heartbeat_ms = AAEON_MCU_WDT_HEARTBEAT_MS;
+ watchdog_init_timeout(wdt, timeout, dev->parent);
+
+ watchdog_set_drvdata(wdt, data);
+ watchdog_set_nowayout(wdt, WATCHDOG_NOWAYOUT);
+ watchdog_stop_on_reboot(wdt);
+ watchdog_stop_ping_on_suspend(wdt);
+ dev_set_drvdata(dev, wdt);
+
+ ret = aaeon_mcu_wdt_status(wdt, &enabled);
+ if (ret)
+ return ret;
+
+ if (enabled)
+ set_bit(WDOG_HW_RUNNING, &wdt->status);
+
+ return devm_watchdog_register_device(dev, wdt);
+}
+
+static int aaeon_mcu_wdt_suspend(struct device *dev)
+{
+ struct watchdog_device *wdt = dev_get_drvdata(dev);
+
+ if (watchdog_active(wdt) || watchdog_hw_running(wdt))
+ return aaeon_mcu_wdt_stop(wdt);
+
+ return 0;
+}
+
+static int aaeon_mcu_wdt_resume(struct device *dev)
+{
+ struct watchdog_device *wdt = dev_get_drvdata(dev);
+
+ if (watchdog_active(wdt) || watchdog_hw_running(wdt))
+ return aaeon_mcu_wdt_start(wdt);
+
+ return 0;
+}
+
+static DEFINE_SIMPLE_DEV_PM_OPS(aaeon_mcu_wdt_pm_ops,
+ aaeon_mcu_wdt_suspend, aaeon_mcu_wdt_resume);
+
+static struct platform_driver aaeon_mcu_wdt_driver = {
+ .driver = {
+ .name = "aaeon-mcu-wdt",
+ .pm = pm_sleep_ptr(&aaeon_mcu_wdt_pm_ops),
+ },
+ .probe = aaeon_mcu_wdt_probe,
+};
+
+module_platform_driver(aaeon_mcu_wdt_driver);
+
+MODULE_ALIAS("platform:aaeon-mcu-wdt");
+MODULE_DESCRIPTION("Aaeon MCU Watchdog Driver");
+MODULE_AUTHOR("Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>");
+MODULE_LICENSE("GPL");
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v9 4/4] watchdog: aaeon: Add watchdog driver for SRG-IMX8P MCU
2026-10-29 14:48 ` [PATCH v9 4/4] watchdog: aaeon: Add watchdog " Thomas Perrot (Schneider Electric)
@ 2026-10-29 14:57 ` sashiko-bot
0 siblings, 0 replies; 7+ messages in thread
From: sashiko-bot @ 2026-10-29 14:57 UTC (permalink / raw)
To: Thomas Perrot (Schneider Electric)
Cc: devicetree, linux-gpio, imx, linux-watchdog, mfd, robh, conor+dt,
Frank.Li, lee
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] watchdog: aaeon: missing kernel-parameters.txt entry for timeout param
--
commit 56cdb5c8b2505a3a5bbfb7ace81364353e737628
Author: Thomas Perrot (Schneider Electric) <thomas.perrot@bootlin.com>
watchdog: aaeon: Add watchdog driver for SRG-IMX8P MCU
This commit adds a watchdog driver for the Aaeon SRG-IMX8P onboard
microcontroller, supporting configurable software timeouts via ioctl,
Device Tree, or a module parameter.
[ ... ]
> diff --git a/drivers/watchdog/aaeon_mcu_wdt.c b/drivers/watchdog/aaeon_mcu_wdt.c
> new file mode 100644
> index 0000000000000..beded3d6326fd
> --- /dev/null
> +++ b/drivers/watchdog/aaeon_mcu_wdt.c
> @@ -0,0 +1,171 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Aaeon MCU Watchdog driver
> + *
> + * Copyright (C) 2026 Bootlin
> + * Author: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
> + * Author: Thomas Perrot <thomas.perrot@bootlin.com>
> + */
> +
> +#include <linux/mfd/aaeon-mcu.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/watchdog.h>
> +
> +#define AAEON_MCU_PING_WDT 0x73
> +
> +#define AAEON_MCU_WDT_TIMEOUT 240
> +#define AAEON_MCU_WDT_HEARTBEAT_MS 25000
> +/* The MCU cannot expire earlier than its fixed heartbeat. */
> +#define AAEON_MCU_WDT_MIN_TIMEOUT (AAEON_MCU_WDT_HEARTBEAT_MS / 1000)
> +
> +static unsigned int timeout;
> +module_param(timeout, uint, 0);
> +MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
[Severity: Low]
Should this new timeout module parameter (accessible on the kernel command
line as aaeon_mcu_wdt.timeout) also be documented in
Documentation/admin-guide/kernel-parameters.txt?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261029-dev-b4-aaeon-mcu-driver-v9-0-f9b6d0cc180d@bootlin.com?part=4
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