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From: sashiko-bot@kernel.org
To: "Long Zhao" <longzhao@ambarella.com>, linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v13 01/13] dt-bindings: gpio: pl061: add Ambarella CV75 variant
Date: Mon, 02 Nov 2026 06:57:20 +0000	[thread overview]
Message-ID: <sashiko-outbox-192986@kernel.org> (raw)
In-Reply-To: <20261102-cv75-gpio-v13-1-4f93114ea204@ambarella.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] dt-bindings: gpio: pl061: split incompatible ambarella,cv75-gpio schema
- [Low] dt-bindings: gpio: pl061: undocumented ambarella vendor prefix
--

commit 698f86de70b79c39ee77a80fb98df0823e4d3989
Author: Long Zhao <longzhao@ambarella.com>

dt-bindings: gpio: pl061: add Ambarella CV75 variant

This commit adds the ambarella,cv75-gpio compatible string and variant
constraints to the ARM PL061 GPIO controller Device Tree binding schema,
requiring gpio-ranges and a fixed arm,primecell-periphid of 0x000e8061.

> diff --git a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml
> index 4d970e55104bb..c22dd8a1d2c18 100644
> --- a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml
> +++ b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml
> @@ -15,7 +15,9 @@ select:
>    properties:
>      compatible:
>        contains:
> -        const: arm,pl061
> +        enum:
> +          - arm,pl061
> +          - ambarella,cv75-gpio

[Severity: Low]
As reported by Krzysztof Kozlowski on v1 [1], does the ambarella vendor
prefix in ambarella,cv75-gpio need to be documented in
Documentation/devicetree/bindings/vendor-prefixes.yaml first so that
checkpatch.pl and make dt_binding_check do not report an undocumented vendor
prefix?

>    required:
>      - compatible
>  
> @@ -25,7 +27,9 @@ properties:
>  
>    compatible:
>      items:
> -      - const: arm,pl061
> +      - enum:
> +          - ambarella,cv75-gpio
> +          - arm,pl061
>        - const: arm,primecell
>  
>    reg:
> @@ -64,6 +68,21 @@ required:
>    - "#gpio-cells"
>    - gpio-controller
>  
> -additionalProperties: false
> +allOf:
> +  - $ref: /schemas/arm/primecell.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: ambarella,cv75-gpio
> +    then:
> +      properties:
> +        arm,primecell-periphid:
> +          const: 0x000e8061
> +      required:
> +        - arm,primecell-periphid
> +        - gpio-ranges
> +
> +unevaluatedProperties: false

[Severity: Medium]
Should ambarella,cv75-gpio be split into its own binding schema document
instead of adding conditional rules to
Documentation/devicetree/bindings/gpio/pl061-gpio.yaml?

As noted in the commit description, the Ambarella CV75 controller has 32-bit
registers and 32 lines per bank, adds MASK and ENABLE registers, is not
register-compatible with the 8-line ARM PL061, and does not implement a
standard PrimeCell ID in its hardware ID registers.

In Documentation/devicetree/bindings/gpio/pl061-gpio.yaml, the existing
properties are constrained for an 8-line PL061 block:

  interrupts:
    oneOf:
      - maxItems: 1
      - maxItems: 8
  ...
  gpio-ranges:
    minItems: 1
    maxItems: 8

Requiring gpio-ranges for ambarella,cv75-gpio in this schema leaves the
8-item limit in place for a 32-line bank, and arm,primecell-periphid is only
defined inside the conditional then branch rather than top-level properties.
Given these hardware and schema differences, would a separate schema file for
ambarella,cv75-gpio be cleaner?

[1] https://lore.kernel.org/r/a8b0729c-d6ff-4fa0-955e-deb0af0e726b@kernel.org

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261102-cv75-gpio-v13-0-4f93114ea204@ambarella.com?part=1

  reply	other threads:[~2026-11-02  6:57 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-02  6:45 [PATCH v13 00/13] gpio: add Ambarella CV75 PL061 support Long Zhao via B4 Relay
2026-11-02  6:45 ` [PATCH v13 01/13] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-11-02  6:57   ` sashiko-bot [this message]
2026-11-02  6:45 ` [PATCH v13 02/13] gpiolib: regmap: add GPIO_REGMAP_QUIRK_SET_AFTER_DIR Long Zhao via B4 Relay
2026-11-02  7:01   ` sashiko-bot
2026-11-02  8:35   ` Michael Walle
2026-11-02  6:45 ` [PATCH v13 03/13] gpio: pl061: drop redundant pending check in the IRQ handler Long Zhao via B4 Relay
2026-11-02  6:45 ` [PATCH v13 04/13] gpio: pl061: convert register access to regmap Long Zhao via B4 Relay
2026-11-02  6:45 ` [PATCH v13 05/13] gpio: pl061: use IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH Long Zhao via B4 Relay
2026-11-02  6:45 ` [PATCH v13 06/13] gpio: pl061: use cleanup helpers for locks Long Zhao via B4 Relay
2026-11-02  6:46 ` [PATCH v13 07/13] gpio: pl061: keep the parent device in a local Long Zhao via B4 Relay
2026-11-02  6:46 ` [PATCH v13 08/13] gpio: regmap: remove gpiochip before tearing down irqchip Long Zhao via B4 Relay
2026-11-02  8:33   ` Michael Walle
2026-11-02  6:46 ` [PATCH v13 09/13] gpiolib: request ACPI GPIO events for external IRQ domains Long Zhao via B4 Relay
2026-11-02  6:46 ` [PATCH v13 10/13] gpio: pl061: switch data path to gpio-regmap Long Zhao via B4 Relay
2026-11-02  7:10   ` sashiko-bot
2026-11-02  6:46 ` [PATCH v13 11/13] gpio: pl061: add Ambarella register-layout variant Long Zhao via B4 Relay
2026-11-02  6:46 ` [PATCH v13 12/13] gpio: pl061: tidy up IRQ trigger logging Long Zhao via B4 Relay
2026-11-02  6:46 ` [PATCH v13 13/13] gpio: pl061: use string_choices helpers for " Long Zhao via B4 Relay

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