Linux Hardening
 help / color / mirror / Atom feed
From: Dan Williams <dan.j.williams@intel.com>
To: Ira Weiny <ira.weiny@intel.com>,
	Dave Jiang <dave.jiang@intel.com>, Fan Ni <fan.ni@samsung.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Kees Cook <kees@kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Alison Schofield <alison.schofield@intel.com>,
	"Vishal Verma" <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>, <linux-cxl@vger.kernel.org>,
	<linux-doc@vger.kernel.org>, <nvdimm@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <linux-hardening@vger.kernel.org>,
	Li Ming <ming.li@zohomail.com>
Subject: Re: [PATCH v8 01/21] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD)
Date: Fri, 3 Jan 2025 14:57:58 -0800	[thread overview]
Message-ID: <67786b76a0c5_f58f294b1@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <20241210-dcd-type2-upstream-v8-1-812852504400@intel.com>

Ira Weiny wrote:
> Per the CXL 3.1 specification software must check the Command Effects
> Log (CEL) for dynamic capacity command support.
> 
> Detect support for the DCD commands while reading the CEL, including:
> 
> 	Get DC Config
> 	Get DC Extent List
> 	Add DC Response
> 	Release DC
> 
> Based on an original patch by Navneet Singh.
> 
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
> Reviewed-by: Li Ming <ming.li@zohomail.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
> ---
>  drivers/cxl/core/mbox.c | 33 +++++++++++++++++++++++++++++++++
>  drivers/cxl/cxlmem.h    | 15 +++++++++++++++
>  2 files changed, 48 insertions(+)
> 
> diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> index 548564c770c02c0a4571a00ae3f6de8f63183183..599934d066518341eb6ea9fc3319cd7098cbc2f3 100644
> --- a/drivers/cxl/core/mbox.c
> +++ b/drivers/cxl/core/mbox.c
> @@ -164,6 +164,34 @@ static void cxl_set_security_cmd_enabled(struct cxl_security_state *security,
>  	}
>  }
>  
> +static bool cxl_is_dcd_command(u16 opcode)
> +{
> +#define CXL_MBOX_OP_DCD_CMDS 0x48
> +
> +	return (opcode >> 8) == CXL_MBOX_OP_DCD_CMDS;
> +}
> +
> +static void cxl_set_dcd_cmd_enabled(struct cxl_memdev_state *mds,
> +				    u16 opcode)
> +{
> +	switch (opcode) {
> +	case CXL_MBOX_OP_GET_DC_CONFIG:
> +		set_bit(CXL_DCD_ENABLED_GET_CONFIG, mds->dcd_cmds);
> +		break;
> +	case CXL_MBOX_OP_GET_DC_EXTENT_LIST:
> +		set_bit(CXL_DCD_ENABLED_GET_EXTENT_LIST, mds->dcd_cmds);
> +		break;
> +	case CXL_MBOX_OP_ADD_DC_RESPONSE:
> +		set_bit(CXL_DCD_ENABLED_ADD_RESPONSE, mds->dcd_cmds);
> +		break;
> +	case CXL_MBOX_OP_RELEASE_DC:
> +		set_bit(CXL_DCD_ENABLED_RELEASE, mds->dcd_cmds);
> +		break;
> +	default:
> +		break;
> +	}
> +}
> +
>  static bool cxl_is_poison_command(u16 opcode)
>  {
>  #define CXL_MBOX_OP_POISON_CMDS 0x43
> @@ -751,6 +779,11 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, size_t size, u8 *cel)
>  			enabled++;
>  		}
>  
> +		if (cxl_is_dcd_command(opcode)) {
> +			cxl_set_dcd_cmd_enabled(mds, opcode);
> +			enabled++;
> +		}
> +
>  		dev_dbg(dev, "Opcode 0x%04x %s\n", opcode,
>  			enabled ? "enabled" : "unsupported by driver");
>  	}
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 2a25d1957ddb9772b8d4dca92534ba76a909f8b3..e8907c403edbd83c8a36b8d013c6bc3391207ee6 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -239,6 +239,15 @@ struct cxl_event_state {
>  	struct mutex log_lock;
>  };
>  
> +/* Device enabled DCD commands */
> +enum dcd_cmd_enabled_bits {
> +	CXL_DCD_ENABLED_GET_CONFIG,
> +	CXL_DCD_ENABLED_GET_EXTENT_LIST,
> +	CXL_DCD_ENABLED_ADD_RESPONSE,
> +	CXL_DCD_ENABLED_RELEASE,
> +	CXL_DCD_ENABLED_MAX
> +};
> +
>  /* Device enabled poison commands */
>  enum poison_cmd_enabled_bits {
>  	CXL_POISON_ENABLED_LIST,
> @@ -461,6 +470,7 @@ static inline struct cxl_dev_state *mbox_to_cxlds(struct cxl_mailbox *cxl_mbox)
>   * @lsa_size: Size of Label Storage Area
>   *                (CXL 2.0 8.2.9.5.1.1 Identify Memory Device)
>   * @firmware_version: Firmware version for the memory device.
> + * @dcd_cmds: List of DCD commands implemented by memory device
>   * @enabled_cmds: Hardware commands found enabled in CEL.
>   * @exclusive_cmds: Commands that are kernel-internal only
>   * @total_bytes: sum of all possible capacities
> @@ -485,6 +495,7 @@ struct cxl_memdev_state {
>  	struct cxl_dev_state cxlds;
>  	size_t lsa_size;
>  	char firmware_version[0x10];
> +	DECLARE_BITMAP(dcd_cmds, CXL_DCD_ENABLED_MAX);

Can you clarify why cxl_memdev_state needs this bitmap? In the case of
'security' and 'poison' functionality there is a subset of functionality
that can be enabled if some of the commands are missing. Like poison
listing is still possible even if poison injection is missing. In the
case of DCD it is all or nothing.

In short, I do not think the cxl_memdev_state object needs to track
anything more than a single "DCD capable" flag, and cxl_walk_cel() can
check for all commands locally without carrying that bitmap around
indefinitely.

Something simple like:

cxl_walk_cel()
    for (...) {
      if (cxl_is_dcd_command()
        set_bit(opcode & 0xf, &dcd_commands);
    }
    if (dcd_commands == 0xf)
        mds->dcd_enabled = true;
    else if (dcd_commands)
        dev_dbg(...)

...otherwise it begs the question why the driver would care about
anything other than "all" dcd commands?

  reply	other threads:[~2025-01-03 22:58 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-11  3:42 [PATCH v8 00/21] DCD: Add support for Dynamic Capacity Devices (DCD) Ira Weiny
2024-12-11  3:42 ` [PATCH v8 01/21] cxl/mbox: Flag " Ira Weiny
2025-01-03 22:57   ` Dan Williams [this message]
2025-01-07  1:10     ` Ira Weiny
2024-12-11  3:42 ` [PATCH v8 02/21] cxl/mem: Read dynamic capacity configuration from the device Ira Weiny
2025-01-15  2:35   ` Dan Williams
2025-01-15 13:55     ` Alejandro Lucero Palau
2025-01-15 20:48       ` Ira Weiny
2025-01-16  6:33       ` Dan Williams
2025-01-15 20:32     ` Ira Weiny
2025-01-15 22:34       ` Dan Williams
2025-01-16 10:32         ` Jonathan Cameron
2025-01-22 21:02           ` Dan Williams
2025-01-22 18:02         ` Ira Weiny
2025-01-22 21:30           ` Dan Williams
2024-12-11  3:42 ` [PATCH v8 03/21] cxl/core: Separate region mode from decoder mode Ira Weiny
2024-12-11  3:42 ` [PATCH v8 04/21] cxl/region: Add dynamic capacity decoder and region modes Ira Weiny
2024-12-11  3:42 ` [PATCH v8 05/21] cxl/hdm: Add dynamic capacity size support to endpoint decoders Ira Weiny
2024-12-11  3:42 ` [PATCH v8 06/21] cxl/cdat: Gather DSMAS data for DCD regions Ira Weiny
2024-12-11  3:42 ` [PATCH v8 07/21] cxl/mem: Expose DCD partition capabilities in sysfs Ira Weiny
2024-12-11  3:42 ` [PATCH v8 08/21] cxl/port: Add endpoint decoder DC mode support to sysfs Ira Weiny
2024-12-11  3:42 ` [PATCH v8 09/21] cxl/region: Add sparse DAX region support Ira Weiny
2024-12-11  3:42 ` [PATCH v8 10/21] cxl/events: Split event msgnum configuration from irq setup Ira Weiny
2024-12-11  3:42 ` [PATCH v8 11/21] cxl/pci: Factor out interrupt policy check Ira Weiny
2024-12-11  3:42 ` [PATCH v8 12/21] cxl/mem: Configure dynamic capacity interrupts Ira Weiny
2024-12-11  3:42 ` [PATCH v8 13/21] cxl/core: Return endpoint decoder information from region search Ira Weiny
2024-12-11  3:42 ` [PATCH v8 14/21] cxl/extent: Process DCD events and realize region extents Ira Weiny
2024-12-11  3:42 ` [PATCH v8 15/21] cxl/region/extent: Expose region extent information in sysfs Ira Weiny
2024-12-11  3:42 ` [PATCH v8 16/21] dax/bus: Factor out dev dax resize logic Ira Weiny
2024-12-11  3:42 ` [PATCH v8 17/21] dax/region: Create resources on sparse DAX regions Ira Weiny
2024-12-11  3:42 ` [PATCH v8 18/21] cxl/region: Read existing extents on region creation Ira Weiny
2024-12-11  3:42 ` [PATCH v8 19/21] cxl/mem: Trace Dynamic capacity Event Record Ira Weiny
2024-12-11  3:42 ` [PATCH v8 20/21] tools/testing/cxl: Make event logs dynamic Ira Weiny
2024-12-11  3:42 ` [PATCH v8 21/21] tools/testing/cxl: Add DC Regions to mock mem data Ira Weiny

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=67786b76a0c5_f58f294b1@dwillia2-xfh.jf.intel.com.notmuch \
    --to=dan.j.williams@intel.com \
    --cc=Jonathan.Cameron@huawei.com \
    --cc=akpm@linux-foundation.org \
    --cc=alison.schofield@intel.com \
    --cc=corbet@lwn.net \
    --cc=dave.jiang@intel.com \
    --cc=dave@stgolabs.net \
    --cc=fan.ni@samsung.com \
    --cc=gustavoars@kernel.org \
    --cc=ira.weiny@intel.com \
    --cc=kees@kernel.org \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-hardening@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=ming.li@zohomail.com \
    --cc=nvdimm@lists.linux.dev \
    --cc=vishal.l.verma@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox