Device trees and systems-on-a-chip

Device trees and systems-on-a-chip

[Linas Vepstas (Code Aurora)]

Arnd,

Here:  http://lwn.net/Articles/457635/  you say:  "If the device tree
vision comes true, a single board will actually be able to use the
same device tree binary on either one, independent of which CPU
actually runs the kernel."

In my case, the hexagon and the arm cores will perceive the same
devices at different addresses; there are also devices attached to one
core that aren't attached to the other.  So either we have two DT's,
one for each core, or we have one DT with subsections for each core.    

I haven't yet looked to see how the DT's are being designed, but I have
this sneaking suspicion that the second alternative is not being
pursued ...

--linas

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

Re: Device trees and systems-on-a-chip

[Arnd Bergmann]

On Friday 23 September 2011 12:13:00 Linas Vepstas wrote:
> Here:  http://lwn.net/Articles/457635/  you say:  "If the device tree
> vision comes true, a single board will actually be able to use the
> same device tree binary on either one, independent of which CPU
> actually runs the kernel."
> 
> In my case, the hexagon and the arm cores will perceive the same
> devices at different addresses; there are also devices attached to one
> core that aren't attached to the other.  So either we have two DT's,
> one for each core, or we have one DT with subsections for each core.    
> 
> I haven't yet looked to see how the DT's are being designed, but I have
> this sneaking suspicion that the second alternative is not being
> pursued ...

Hi Linas,

You can have .dtsi include files that describe the common parts and
just put the child buses at different addresses or leave them out
from a main .dts source file.
I think it should all work out. If not, there is still the option
of adding features to dtc to allow what you need.

	Arnd