From: Sohil Mehta <sohil.mehta@intel.com>
To: x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
Tony Luck <tony.luck@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>, "H . Peter Anvin" <hpa@zytor.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Andy Lutomirski <luto@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Fenghua Yu <fenghua.yu@intel.com>,
Jean Delvare <jdelvare@suse.com>,
Guenter Roeck <linux@roeck-us.net>,
Sohil Mehta <sohil.mehta@intel.com>,
Zhang Rui <rui.zhang@intel.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org,
linux-hwmon@vger.kernel.org
Subject: [RFC PATCH 11/15] x86/pat: Replace Intel model checks with VFM ones
Date: Fri, 20 Dec 2024 21:37:06 +0000 [thread overview]
Message-ID: <20241220213711.1892696-12-sohil.mehta@intel.com> (raw)
In-Reply-To: <20241220213711.1892696-1-sohil.mehta@intel.com>
Introduce markers and names for some family 6 and family 15 models and
replace with VFM based checks.
Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
---
arch/x86/include/asm/intel-family.h | 2 ++
arch/x86/mm/pat/memtype.c | 7 ++++---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 025d091be98e..76a184361930 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -186,8 +186,10 @@
#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
/* Family 15 */
+#define INTEL_FAM15_START IFM(15, 0x00) /* Notational marker */
#define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */
#define INTEL_P4_PRESCOTT IFM(15, 0x03)
+#define INTEL_P4_CEDARMILL IFM(15, 0x06) /* Also Xeon Dempsey */
/* Family 19 */
#define INTEL_PANTHERCOVE_X IFM(19, 0x01) /* Diamond Rapids */
diff --git a/arch/x86/mm/pat/memtype.c b/arch/x86/mm/pat/memtype.c
index feb8cc6a12bf..e6d7dc608b77 100644
--- a/arch/x86/mm/pat/memtype.c
+++ b/arch/x86/mm/pat/memtype.c
@@ -43,6 +43,7 @@
#include <linux/fs.h>
#include <linux/rbtree.h>
+#include <asm/cpu_device_id.h>
#include <asm/cacheflush.h>
#include <asm/cacheinfo.h>
#include <asm/processor.h>
@@ -290,9 +291,9 @@ void __init pat_bp_init(void)
return;
}
- if ((c->x86_vendor == X86_VENDOR_INTEL) &&
- (((c->x86 == 0x6) && (c->x86_model <= 0xd)) ||
- ((c->x86 == 0xf) && (c->x86_model <= 0x6)))) {
+ if (c->x86_vendor == X86_VENDOR_INTEL &&
+ ((c->x86_vfm >= INTEL_PENTIUM_PRO && c->x86_vfm <= INTEL_PENTIUM_M_DOTHAN) ||
+ (c->x86_vfm > INTEL_FAM15_START && c->x86_vfm <= INTEL_P4_CEDARMILL))) {
/*
* PAT support with the lower four entries. Intel Pentium 2,
* 3, M, and 4 are affected by PAT errata, which makes the
--
2.43.0
next prev parent reply other threads:[~2024-12-20 21:39 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-20 21:36 [RFC PATCH 00/15] Prepare for new Intel family models Sohil Mehta
2024-12-20 21:36 ` [RFC PATCH 01/15] x86/apic: Fix 32-bit APIC initialization for extended Intel families Sohil Mehta
2024-12-20 23:13 ` Dave Hansen
2024-12-23 20:40 ` Sohil Mehta
2024-12-20 21:36 ` [RFC PATCH 02/15] x86/apic: Fix smp init delay " Sohil Mehta
2024-12-20 23:20 ` Dave Hansen
2024-12-23 21:55 ` Sohil Mehta
2024-12-20 21:36 ` [RFC PATCH 03/15] x86/cpu/intel: Fix init_intel() checks for extended family numbers Sohil Mehta
2024-12-20 23:27 ` Dave Hansen
2024-12-23 23:41 ` Sohil Mehta
2024-12-20 21:36 ` [RFC PATCH 04/15] cpufreq: Fix the efficient idle check for Intel extended families Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 05/15] hwmon: Fix Intel family checks to include extended family numbers Sohil Mehta
2024-12-21 17:27 ` Guenter Roeck
2024-12-23 18:13 ` Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 06/15] x86/microcode: Update the Intel processor flag scan check Sohil Mehta
2024-12-21 9:11 ` Borislav Petkov
2024-12-23 19:52 ` Sohil Mehta
2024-12-21 15:46 ` Dave Hansen
2024-12-20 21:37 ` [RFC PATCH 07/15] x86/mtrr: Modify a x86_model check to an Intel VFM check Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 08/15] x86/cpu/intel: Replace early family 6 checks with VFM ones Sohil Mehta
2024-12-21 10:35 ` David Laight
2024-12-21 15:57 ` Dave Hansen
2024-12-21 16:48 ` David Laight
2024-12-21 18:30 ` Dave Hansen
2024-12-23 20:13 ` Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 09/15] x86/cpu/intel: Replace family 15 " Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 10/15] x86/cpu/intel: Replace family 5 model " Sohil Mehta
2024-12-20 21:37 ` Sohil Mehta [this message]
2024-12-20 21:37 ` [RFC PATCH 12/15] x86/acpi/cstate: Improve Intel family model checks Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 13/15] x86/cpu/intel: Bound the non-architectural constant_tsc " Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 14/15] perf/x86: Simplify p6_pmu_init() Sohil Mehta
2024-12-20 21:37 ` [RFC PATCH 15/15] perf/x86/p4: Replace Pentium 4 model checks with VFM ones Sohil Mehta
2024-12-21 0:29 ` [RFC PATCH 00/15] Prepare for new Intel family models Andrew Cooper
2024-12-23 19:43 ` Sohil Mehta
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