* [PATCH v2] hwmon: (lm63) Mask PWM frequency multiplier to supported bits
@ 2026-07-27 21:04 Guenter Roeck
2026-07-27 21:24 ` sashiko-bot
0 siblings, 1 reply; 2+ messages in thread
From: Guenter Roeck @ 2026-07-27 21:04 UTC (permalink / raw)
To: Hardware Monitoring; +Cc: Guenter Roeck, Sashiko
Sashiko is concerned that reading a PWM frequency multiplier outside
the supported range of [1, 31] might result in bad PWM values written
to the chip. Technically, the chip should never return a value with
the upper 3 bits set, so this should never happen. However, it is
unknown if there are LM63 variants where the upper bits of the register
can be written.
Mask the register value read from the chip to only accept the lower 5 bit
when reading it from the chip to avoid the problem.
Reported-by: Sashiko <sashiko-bot@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
Note: The patch does not take error returns from I2C operations into
account. This is an overall driver problem.
Fixing it would require a separate patch or patch series.
v2: Use mask instead of clamp, assuming that the upper 3 bits, is set,
will never report a frequency multiplier.
drivers/hwmon/lm63.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c
index e2a429e579ac..da09770c05e7 100644
--- a/drivers/hwmon/lm63.c
+++ b/drivers/hwmon/lm63.c
@@ -247,8 +247,7 @@ static struct lm63_data *lm63_update_device(struct device *dev)
LM63_REG_TACH_LIMIT_MSB) << 8);
}
- data->pwm1_freq = i2c_smbus_read_byte_data(client,
- LM63_REG_PWM_FREQ);
+ data->pwm1_freq = i2c_smbus_read_byte_data(client, LM63_REG_PWM_FREQ) & 0x1f;
if (data->pwm1_freq == 0)
data->pwm1_freq = 1;
data->pwm1[0] = i2c_smbus_read_byte_data(client,
@@ -1187,7 +1186,7 @@ static void lm63_init_client(struct lm63_data *data)
data->config |= 0x04;
/* We may need pwm1_freq before ever updating the client data */
- data->pwm1_freq = i2c_smbus_read_byte_data(client, LM63_REG_PWM_FREQ);
+ data->pwm1_freq = i2c_smbus_read_byte_data(client, LM63_REG_PWM_FREQ) & 0x1f;
if (data->pwm1_freq == 0)
data->pwm1_freq = 1;
--
2.45.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] hwmon: (lm63) Mask PWM frequency multiplier to supported bits
2026-07-27 21:04 [PATCH v2] hwmon: (lm63) Mask PWM frequency multiplier to supported bits Guenter Roeck
@ 2026-07-27 21:24 ` sashiko-bot
0 siblings, 0 replies; 2+ messages in thread
From: sashiko-bot @ 2026-07-27 21:24 UTC (permalink / raw)
To: Guenter Roeck; +Cc: linux-hwmon
> Sashiko is concerned that reading a PWM frequency multiplier outside
> the supported range of [1, 31] might result in bad PWM values written
> to the chip. Technically, the chip should never return a value with
> the upper 3 bits set, so this should never happen. However, it is
> unknown if there are LM63 variants where the upper bits of the register
> can be written.
>
> Mask the register value read from the chip to only accept the lower 5 bit
> when reading it from the chip to avoid the problem.
>
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260727210457.3720204-1-linux@roeck-us.net?part=1
^ permalink raw reply [flat|nested] 2+ messages in thread
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