From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Dave Hansen <dave.hansen@intel.com>,
Sohil Mehta <sohil.mehta@intel.com>,
x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
Tony Luck <tony.luck@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>, "H . Peter Anvin" <hpa@zytor.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Andy Lutomirski <luto@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Fenghua Yu <fenghua.yu@intel.com>,
Jean Delvare <jdelvare@suse.com>,
Guenter Roeck <linux@roeck-us.net>,
Zhang Rui <rui.zhang@intel.com>,
David Laight <david.laight.linux@gmail.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org,
linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v2 05/17] x86/cpu/intel: Fix page copy performance for extended Families
Date: Wed, 12 Feb 2025 00:54:52 +0000 [thread overview]
Message-ID: <2299c94f-aa46-47b5-bd25-9436a8fbd619@citrix.com> (raw)
In-Reply-To: <b9c21518-54fc-4907-8fc3-d492a3f33bdf@intel.com>
On 11/02/2025 8:53 pm, Dave Hansen wrote:
> On 2/11/25 11:43, Sohil Mehta wrote:
>> + /*
>> + * Modern CPUs are generally expected to have a sane fast string
>> + * implementation. However, the BIOS may disable it on certain CPUs
>> + * via the architectural FAST_STRING bit.
>> + */
>> + if (IS_ENABLED(CONFIG_X86_64) && (c->x86 == 6 || c->x86 > 15))
>> + set_cpu_cap(c, X86_FEATURE_REP_GOOD);
> I'm not sure the BIOS comment is helpful here.
>
> Also, at this point, let's just make the check >=6 (or the >=PPRO
> equivalent).
>
> It will only matter if *all* of these are true:
> 1. Someone has a 64-bit capable P4 that powers on
> 2. They're running a 64-bit mainline kernel
> 3. String copy is *actually* slower than the alternative
> 4. They are performance sensitive enough to notice
>
> We don't even know the answer to #3 for sure. Let's just say what we're
> doing in a comment:
>
> /* Assume that any 64-bit CPU has a good implementation */
If you're going to override the BIOS setting, then you need to
explicitly set MSR_MISC_ENABLE.FAST_STRINGS.
Otherwise you're claiming to Linux that REP is good even when hardware
is prohibited from using optimisations.
~Andrew
next prev parent reply other threads:[~2025-02-12 0:54 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 19:43 [PATCH v2 00/17] Prepare for new Intel Family numbers Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 01/17] x86/smpboot: Remove confusing quirk usage in INIT delay Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 02/17] x86/smpboot: Fix INIT delay optimization for extended Intel Families Sohil Mehta
2025-02-11 20:10 ` Dave Hansen
2025-02-11 20:20 ` Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 03/17] x86/apic: Fix 32-bit APIC initialization " Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 04/17] x86/cpu/intel: Fix the movsl alignment preference for extended Families Sohil Mehta
2025-02-11 20:26 ` Dave Hansen
2025-02-11 21:45 ` David Laight
2025-02-11 19:43 ` [PATCH v2 05/17] x86/cpu/intel: Fix page copy performance " Sohil Mehta
2025-02-11 20:53 ` Dave Hansen
2025-02-12 0:54 ` Andrew Cooper [this message]
2025-02-12 21:19 ` Sohil Mehta
2025-02-13 23:02 ` Andrew Cooper
2025-02-14 0:29 ` Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 06/17] cpufreq: Fix the efficient idle check for Intel " Sohil Mehta
2025-02-12 5:35 ` Zhang, Rui
2025-02-13 18:49 ` Sohil Mehta
2025-02-14 2:03 ` Zhang, Rui
2025-02-11 19:43 ` [PATCH v2 07/17] hwmon: Fix Intel Family-model checks to include " Sohil Mehta
2025-02-11 20:58 ` Dave Hansen
2025-02-11 21:38 ` Sohil Mehta
2025-02-12 13:43 ` Zhang, Rui
2025-02-12 16:57 ` Dave Hansen
2025-02-14 2:23 ` Zhang, Rui
2025-02-12 13:10 ` Zhang, Rui
2025-02-11 19:43 ` [PATCH v2 08/17] x86/microcode: Update the Intel processor flag scan check Sohil Mehta
2025-02-11 21:00 ` Dave Hansen
2025-02-11 19:43 ` [PATCH v2 09/17] x86/mtrr: Modify a x86_model check to an Intel VFM check Sohil Mehta
2025-02-11 21:00 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 10/17] x86/cpu/intel: Replace early Family 6 checks with VFM ones Sohil Mehta
2025-02-11 21:03 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 11/17] x86/cpu/intel: Replace Family 15 " Sohil Mehta
2025-02-11 21:03 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 12/17] x86/cpu/intel: Replace Family 5 model " Sohil Mehta
2025-02-11 21:06 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 13/17] x86/pat: Replace Intel x86_model " Sohil Mehta
2025-02-11 21:09 ` Dave Hansen
2025-02-11 21:42 ` Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 14/17] x86/acpi/cstate: Improve Intel Family model checks Sohil Mehta
2025-02-11 21:20 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 15/17] x86/cpu/intel: Bound the non-architectural constant_tsc " Sohil Mehta
2025-02-11 21:41 ` Dave Hansen
2025-02-12 0:45 ` Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 16/17] perf/x86: Simplify P6 PMU initialization Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 17/17] perf/x86/p4: Replace Pentium 4 model checks with VFM ones Sohil Mehta
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