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From: "Gupta, Akshay" <Akshay.Gupta@amd.com>
To: Greg KH <gregkh@linuxfoundation.org>
Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux@roeck-us.net, arnd@arndb.de,
	naveenkrishna.chatradhi@amd.com
Subject: Re: [PATCH v2 3/8] misc: amd-sbi: Add support for AMD_SBI IOCTL
Date: Mon, 22 Jul 2024 13:48:09 +0530	[thread overview]
Message-ID: <526b14e9-60f6-980a-35f5-37529591a1ab@amd.com> (raw)
In-Reply-To: <2024071719-boil-curvy-48df@gregkh>


On 7/17/2024 2:14 PM, Greg KH wrote:
> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
>
>
> On Wed, Jul 17, 2024 at 08:10:22AM +0000, Akshay Gupta wrote:
>> +/* These are byte indexes into data_in and data_out arrays */
>> +#define RD_WR_DATA_INDEX     0
>> +#define REG_OFF_INDEX                0
>> +#define REG_VAL_INDEX                4
>> +#define RD_FLAG_INDEX                7
>> +
>> +#define MB_DATA_SIZE         4
> These are VERY badly named global defines for all of the kernel and
> userspace.  But most importantly, do you even need them here?  If so,
> please provide something sane.
>
These are required as used as-is by userspace. We will modify the names 
of the MACROS.

We will update the MACROS with AMD specific prefix.

>> +
>> +struct apml_message {
>> +     /* message ids:
>> +      * Mailbox Messages:    0x0 ... 0x999
>> +      */
>> +     __u32 cmd;
>> +
>> +     /*
>> +      * 8 bit data for reg read,
>> +      * 32 bit data in case of mailbox,
>> +      */
>> +     union {
>> +             __u32 mb_out[2];
>> +             __u8 reg_out[8];
>> +     } data_out;
>> +
>> +     /*
>> +      * [0]...[3] mailbox 32bit input
>> +      * [7] read/write functionality
>> +      */
>> +     union {
>> +             __u32 mb_in[2];
>> +             __u8 reg_in[8];
>> +     } data_in;
>> +} __attribute__((packed));
>> +
>> +/* ioctl command for mailbox msgs using generic _IOWR */
>> +#define AMD_SBI_BASE_IOCTL_NR        0xF9
>> +#define SBRMI_IOCTL_CMD              _IOWR(AMD_SBI_BASE_IOCTL_NR, 0, struct apml_message)
> Why is the ioctl command not prefixed with AMD_SBMI_BASE as well?
Existing APML library uses the "SBRMI_IOCTL_CMD", so will rename the 
AMD_SBI_BASE_IOCTL_NR to match with ioctl command.
>
> thanks,
>
> greg k-h

Do you want me to make these changes before you review the rest of the 
patches?

Thanks,

Akshay


  reply	other threads:[~2024-07-22  8:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-17  8:10 [PATCH v2 0/8] misc: Add AMD side band interface(SBI) functionality Akshay Gupta
2024-07-17  8:10 ` [PATCH v2 1/8] hwmon/misc: amd-sbi: Move core sbrmi from hwmon to misc Akshay Gupta
2024-07-17 16:26   ` Guenter Roeck
2024-07-18 10:21     ` Gupta, Akshay
2024-07-18 14:43       ` Guenter Roeck
2024-07-17  8:10 ` [PATCH v2 2/8] misc: amd-sbi: Use regmap subsystem Akshay Gupta
2024-07-17  8:10 ` [PATCH v2 3/8] misc: amd-sbi: Add support for AMD_SBI IOCTL Akshay Gupta
2024-07-17  8:44   ` Greg KH
2024-07-22  8:18     ` Gupta, Akshay [this message]
2024-07-17  8:10 ` [PATCH v2 4/8] misc: amd-sbi: Add support for mailbox error codes Akshay Gupta
2024-07-17  8:10 ` [PATCH v2 5/8] misc: amd-sbi: Add support for CPUID protocol Akshay Gupta
2024-07-17  8:10 ` [PATCH v2 6/8] misc: amd-sbi: Add support for MCA register protocol Akshay Gupta
2024-07-17  8:10 ` [PATCH v2 7/8] misc: amd-sbi: Add supoort for register xfer Akshay Gupta
2024-07-17  8:10 ` [PATCH v2 8/8] misc: amd-sbi: Add document for AMD SB IOCTL description Akshay Gupta

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