* [PATCH AUTOSEL 6.0 13/44] clocksource/drivers/hyperv: add data structure for reference TSC MSR [not found] <20221119021124.1773699-1-sashal@kernel.org> @ 2022-11-19 2:10 ` Sasha Levin 2022-11-19 5:37 ` Michael Kelley (LINUX) 2022-11-19 2:10 ` [PATCH AUTOSEL 6.0 14/44] x86/hyperv: fix invalid writes to MSRs during root partition kexec Sasha Levin 1 sibling, 1 reply; 6+ messages in thread From: Sasha Levin @ 2022-11-19 2:10 UTC (permalink / raw) To: linux-kernel, stable Cc: Anirudh Rayabharam, Michael Kelley, Wei Liu, Sasha Levin, kys, haiyangz, decui, daniel.lezcano, tglx, linux-hyperv, linux-arch From: Anirudh Rayabharam <anrayabh@linux.microsoft.com> [ Upstream commit 4ad1aa571214e8d6468a1806794d987b374b5a08 ] Add a data structure to represent the reference TSC MSR similar to other MSRs. This simplifies the code for updating the MSR. Signed-off-by: Anirudh Rayabharam <anrayabh@linux.microsoft.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20221027095729.1676394-2-anrayabh@linux.microsoft.com Signed-off-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/clocksource/hyperv_timer.c | 29 +++++++++++++++-------------- include/asm-generic/hyperv-tlfs.h | 9 +++++++++ 2 files changed, 24 insertions(+), 14 deletions(-) diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index bb47610bbd1c..18de1f439ffd 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -21,6 +21,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/acpi.h> +#include <linux/hyperv.h> #include <clocksource/hyperv_timer.h> #include <asm/hyperv-tlfs.h> #include <asm/mshyperv.h> @@ -395,25 +396,25 @@ static u64 notrace read_hv_sched_clock_tsc(void) static void suspend_hv_clock_tsc(struct clocksource *arg) { - u64 tsc_msr; + union hv_reference_tsc_msr tsc_msr; /* Disable the TSC page */ - tsc_msr = hv_get_register(HV_REGISTER_REFERENCE_TSC); - tsc_msr &= ~BIT_ULL(0); - hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr); + tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); + tsc_msr.enable = 0; + hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); } static void resume_hv_clock_tsc(struct clocksource *arg) { phys_addr_t phys_addr = virt_to_phys(&tsc_pg); - u64 tsc_msr; + union hv_reference_tsc_msr tsc_msr; /* Re-enable the TSC page */ - tsc_msr = hv_get_register(HV_REGISTER_REFERENCE_TSC); - tsc_msr &= GENMASK_ULL(11, 0); - tsc_msr |= BIT_ULL(0) | (u64)phys_addr; - hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr); + tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); + tsc_msr.enable = 1; + tsc_msr.pfn = HVPFN_DOWN(phys_addr); + hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); } #ifdef HAVE_VDSO_CLOCKMODE_HVCLOCK @@ -495,7 +496,7 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock) {} static bool __init hv_init_tsc_clocksource(void) { - u64 tsc_msr; + union hv_reference_tsc_msr tsc_msr; phys_addr_t phys_addr; if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) @@ -530,10 +531,10 @@ static bool __init hv_init_tsc_clocksource(void) * (which already has at least the low 12 bits set to zero since * it is page aligned). Also set the "enable" bit, which is bit 0. */ - tsc_msr = hv_get_register(HV_REGISTER_REFERENCE_TSC); - tsc_msr &= GENMASK_ULL(11, 0); - tsc_msr = tsc_msr | 0x1 | (u64)phys_addr; - hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr); + tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); + tsc_msr.enable = 1; + tsc_msr.pfn = HVPFN_DOWN(phys_addr); + hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100); diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hyperv-tlfs.h index fdce7a4cfc6f..b17c6eeb9afa 100644 --- a/include/asm-generic/hyperv-tlfs.h +++ b/include/asm-generic/hyperv-tlfs.h @@ -102,6 +102,15 @@ struct ms_hyperv_tsc_page { volatile s64 tsc_offset; } __packed; +union hv_reference_tsc_msr { + u64 as_uint64; + struct { + u64 enable:1; + u64 reserved:11; + u64 pfn:52; + } __packed; +}; + /* * The guest OS needs to register the guest ID with the hypervisor. * The guest ID is a 64 bit entity and the structure of this ID is -- 2.35.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* RE: [PATCH AUTOSEL 6.0 13/44] clocksource/drivers/hyperv: add data structure for reference TSC MSR 2022-11-19 2:10 ` [PATCH AUTOSEL 6.0 13/44] clocksource/drivers/hyperv: add data structure for reference TSC MSR Sasha Levin @ 2022-11-19 5:37 ` Michael Kelley (LINUX) 2022-11-24 15:51 ` Sasha Levin 0 siblings, 1 reply; 6+ messages in thread From: Michael Kelley (LINUX) @ 2022-11-19 5:37 UTC (permalink / raw) To: Sasha Levin, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Anirudh Rayabharam, Wei Liu Cc: KY Srinivasan, Haiyang Zhang, Dexuan Cui, daniel.lezcano@linaro.org, tglx@linutronix.de, linux-hyperv@vger.kernel.org, linux-arch@vger.kernel.org From: Sasha Levin <sashal@kernel.org> Sent: Friday, November 18, 2022 6:11 PM > > From: Anirudh Rayabharam <anrayabh@linux.microsoft.com> > > [ Upstream commit 4ad1aa571214e8d6468a1806794d987b374b5a08 ] > > Add a data structure to represent the reference TSC MSR similar to > other MSRs. This simplifies the code for updating the MSR. > > Signed-off-by: Anirudh Rayabharam <anrayabh@linux.microsoft.com> > Reviewed-by: Michael Kelley <mikelley@microsoft.com> > Link: https://lore.kernel.org/all/20221027095729.1676394-2-anrayabh@linux.microsoft.com/ > Signed-off-by: Wei Liu <wei.liu@kernel.org> > Signed-off-by: Sasha Levin <sashal@kernel.org> Sasha -- I don't think this patch needs to be backported to any stable versions. Anirudh or Wei Liu, can you confirm? The patch is more about enabling a new scenario than fixing a bug. Michael > --- > drivers/clocksource/hyperv_timer.c | 29 +++++++++++++++-------------- > include/asm-generic/hyperv-tlfs.h | 9 +++++++++ > 2 files changed, 24 insertions(+), 14 deletions(-) > > diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c > index bb47610bbd1c..18de1f439ffd 100644 > --- a/drivers/clocksource/hyperv_timer.c > +++ b/drivers/clocksource/hyperv_timer.c > @@ -21,6 +21,7 @@ > #include <linux/interrupt.h> > #include <linux/irq.h> > #include <linux/acpi.h> > +#include <linux/hyperv.h> > #include <clocksource/hyperv_timer.h> > #include <asm/hyperv-tlfs.h> > #include <asm/mshyperv.h> > @@ -395,25 +396,25 @@ static u64 notrace read_hv_sched_clock_tsc(void) > > static void suspend_hv_clock_tsc(struct clocksource *arg) > { > - u64 tsc_msr; > + union hv_reference_tsc_msr tsc_msr; > > /* Disable the TSC page */ > - tsc_msr = hv_get_register(HV_REGISTER_REFERENCE_TSC); > - tsc_msr &= ~BIT_ULL(0); > - hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr); > + tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); > + tsc_msr.enable = 0; > + hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); > } > > > static void resume_hv_clock_tsc(struct clocksource *arg) > { > phys_addr_t phys_addr = virt_to_phys(&tsc_pg); > - u64 tsc_msr; > + union hv_reference_tsc_msr tsc_msr; > > /* Re-enable the TSC page */ > - tsc_msr = hv_get_register(HV_REGISTER_REFERENCE_TSC); > - tsc_msr &= GENMASK_ULL(11, 0); > - tsc_msr |= BIT_ULL(0) | (u64)phys_addr; > - hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr); > + tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); > + tsc_msr.enable = 1; > + tsc_msr.pfn = HVPFN_DOWN(phys_addr); > + hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); > } > > #ifdef HAVE_VDSO_CLOCKMODE_HVCLOCK > @@ -495,7 +496,7 @@ static __always_inline void hv_setup_sched_clock(void > *sched_clock) {} > > static bool __init hv_init_tsc_clocksource(void) > { > - u64 tsc_msr; > + union hv_reference_tsc_msr tsc_msr; > phys_addr_t phys_addr; > > if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) > @@ -530,10 +531,10 @@ static bool __init hv_init_tsc_clocksource(void) > * (which already has at least the low 12 bits set to zero since > * it is page aligned). Also set the "enable" bit, which is bit 0. > */ > - tsc_msr = hv_get_register(HV_REGISTER_REFERENCE_TSC); > - tsc_msr &= GENMASK_ULL(11, 0); > - tsc_msr = tsc_msr | 0x1 | (u64)phys_addr; > - hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr); > + tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); > + tsc_msr.enable = 1; > + tsc_msr.pfn = HVPFN_DOWN(phys_addr); > + hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); > > clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100); > > diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hyperv-tlfs.h > index fdce7a4cfc6f..b17c6eeb9afa 100644 > --- a/include/asm-generic/hyperv-tlfs.h > +++ b/include/asm-generic/hyperv-tlfs.h > @@ -102,6 +102,15 @@ struct ms_hyperv_tsc_page { > volatile s64 tsc_offset; > } __packed; > > +union hv_reference_tsc_msr { > + u64 as_uint64; > + struct { > + u64 enable:1; > + u64 reserved:11; > + u64 pfn:52; > + } __packed; > +}; > + > /* > * The guest OS needs to register the guest ID with the hypervisor. > * The guest ID is a 64 bit entity and the structure of this ID is > -- > 2.35.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH AUTOSEL 6.0 13/44] clocksource/drivers/hyperv: add data structure for reference TSC MSR 2022-11-19 5:37 ` Michael Kelley (LINUX) @ 2022-11-24 15:51 ` Sasha Levin 2022-11-25 15:39 ` Wei Liu 0 siblings, 1 reply; 6+ messages in thread From: Sasha Levin @ 2022-11-24 15:51 UTC (permalink / raw) To: Michael Kelley (LINUX) Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org, Anirudh Rayabharam, Wei Liu, KY Srinivasan, Haiyang Zhang, Dexuan Cui, daniel.lezcano@linaro.org, tglx@linutronix.de, linux-hyperv@vger.kernel.org, linux-arch@vger.kernel.org On Sat, Nov 19, 2022 at 05:37:16AM +0000, Michael Kelley (LINUX) wrote: >From: Sasha Levin <sashal@kernel.org> Sent: Friday, November 18, 2022 6:11 PM >> >> From: Anirudh Rayabharam <anrayabh@linux.microsoft.com> >> >> [ Upstream commit 4ad1aa571214e8d6468a1806794d987b374b5a08 ] >> >> Add a data structure to represent the reference TSC MSR similar to >> other MSRs. This simplifies the code for updating the MSR. >> >> Signed-off-by: Anirudh Rayabharam <anrayabh@linux.microsoft.com> >> Reviewed-by: Michael Kelley <mikelley@microsoft.com> >> Link: https://lore.kernel.org/all/20221027095729.1676394-2-anrayabh@linux.microsoft.com/ >> Signed-off-by: Wei Liu <wei.liu@kernel.org> >> Signed-off-by: Sasha Levin <sashal@kernel.org> > >Sasha -- I don't think this patch needs to be backported to any stable versions. Anirudh >or Wei Liu, can you confirm? The patch is more about enabling a new scenario than fixing a bug. Ack, I'll drop both of the patches you've pointed out. Thanks! -- Thanks, Sasha ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH AUTOSEL 6.0 13/44] clocksource/drivers/hyperv: add data structure for reference TSC MSR 2022-11-24 15:51 ` Sasha Levin @ 2022-11-25 15:39 ` Wei Liu 0 siblings, 0 replies; 6+ messages in thread From: Wei Liu @ 2022-11-25 15:39 UTC (permalink / raw) To: Sasha Levin Cc: Michael Kelley (LINUX), linux-kernel@vger.kernel.org, stable@vger.kernel.org, Anirudh Rayabharam, Wei Liu, KY Srinivasan, Haiyang Zhang, Dexuan Cui, daniel.lezcano@linaro.org, tglx@linutronix.de, linux-hyperv@vger.kernel.org, linux-arch@vger.kernel.org On Thu, Nov 24, 2022 at 10:51:06AM -0500, Sasha Levin wrote: > On Sat, Nov 19, 2022 at 05:37:16AM +0000, Michael Kelley (LINUX) wrote: > > From: Sasha Levin <sashal@kernel.org> Sent: Friday, November 18, 2022 6:11 PM > > > > > > From: Anirudh Rayabharam <anrayabh@linux.microsoft.com> > > > > > > [ Upstream commit 4ad1aa571214e8d6468a1806794d987b374b5a08 ] > > > > > > Add a data structure to represent the reference TSC MSR similar to > > > other MSRs. This simplifies the code for updating the MSR. > > > > > > Signed-off-by: Anirudh Rayabharam <anrayabh@linux.microsoft.com> > > > Reviewed-by: Michael Kelley <mikelley@microsoft.com> > > > Link: https://lore.kernel.org/all/20221027095729.1676394-2-anrayabh@linux.microsoft.com/ > > > Signed-off-by: Wei Liu <wei.liu@kernel.org> > > > Signed-off-by: Sasha Levin <sashal@kernel.org> > > > > Sasha -- I don't think this patch needs to be backported to any stable versions. Anirudh > > or Wei Liu, can you confirm? The patch is more about enabling a new scenario than fixing a bug. > > Ack, I'll drop both of the patches you've pointed out. Thanks! Sorry for the late reply -- I think you should keep this patch and the other one. The other patch fixes a real issue while kexec'ing in the Linux root partition. This patch is a prerequisite for that. Thanks, Wei. > > -- > Thanks, > Sasha ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH AUTOSEL 6.0 14/44] x86/hyperv: fix invalid writes to MSRs during root partition kexec [not found] <20221119021124.1773699-1-sashal@kernel.org> 2022-11-19 2:10 ` [PATCH AUTOSEL 6.0 13/44] clocksource/drivers/hyperv: add data structure for reference TSC MSR Sasha Levin @ 2022-11-19 2:10 ` Sasha Levin 2022-11-19 5:37 ` Michael Kelley (LINUX) 1 sibling, 1 reply; 6+ messages in thread From: Sasha Levin @ 2022-11-19 2:10 UTC (permalink / raw) To: linux-kernel, stable Cc: Anirudh Rayabharam, Michael Kelley, Wei Liu, Sasha Levin, kys, haiyangz, decui, tglx, mingo, bp, dave.hansen, x86, linux-hyperv From: Anirudh Rayabharam <anrayabh@linux.microsoft.com> [ Upstream commit 2982635a0b3d08d6fee2ff05632206286df0e703 ] hyperv_cleanup resets the hypercall page by setting the MSR to 0. However, the root partition is not allowed to write to the GPA bits of the MSR. Instead, it uses the hypercall page provided by the MSR. Similar is the case with the reference TSC MSR. Clear only the enable bit instead of zeroing the entire MSR to make the code valid for root partition too. Signed-off-by: Anirudh Rayabharam <anrayabh@linux.microsoft.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20221027095729.1676394-3-anrayabh@linux.microsoft.com Signed-off-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org> --- arch/x86/hyperv/hv_init.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c index 3de6d8b53367..10186bd6d67e 100644 --- a/arch/x86/hyperv/hv_init.c +++ b/arch/x86/hyperv/hv_init.c @@ -537,6 +537,7 @@ void __init hyperv_init(void) void hyperv_cleanup(void) { union hv_x64_msr_hypercall_contents hypercall_msr; + union hv_reference_tsc_msr tsc_msr; unregister_syscore_ops(&hv_syscore_ops); @@ -552,12 +553,14 @@ void hyperv_cleanup(void) hv_hypercall_pg = NULL; /* Reset the hypercall page */ - hypercall_msr.as_uint64 = 0; - wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); + hypercall_msr.as_uint64 = hv_get_register(HV_X64_MSR_HYPERCALL); + hypercall_msr.enable = 0; + hv_set_register(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); /* Reset the TSC page */ - hypercall_msr.as_uint64 = 0; - wrmsrl(HV_X64_MSR_REFERENCE_TSC, hypercall_msr.as_uint64); + tsc_msr.as_uint64 = hv_get_register(HV_X64_MSR_REFERENCE_TSC); + tsc_msr.enable = 0; + hv_set_register(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64); } void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die) -- 2.35.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* RE: [PATCH AUTOSEL 6.0 14/44] x86/hyperv: fix invalid writes to MSRs during root partition kexec 2022-11-19 2:10 ` [PATCH AUTOSEL 6.0 14/44] x86/hyperv: fix invalid writes to MSRs during root partition kexec Sasha Levin @ 2022-11-19 5:37 ` Michael Kelley (LINUX) 0 siblings, 0 replies; 6+ messages in thread From: Michael Kelley (LINUX) @ 2022-11-19 5:37 UTC (permalink / raw) To: Sasha Levin, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Anirudh Rayabharam, Wei Liu Cc: mingo@redhat.com, KY Srinivasan, Haiyang Zhang, Dexuan Cui, tglx@linutronix.de, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, linux-hyperv@vger.kernel.org From: Sasha Levin <sashal@kernel.org> Sent: Friday, November 18, 2022 6:11 PM > > From: Anirudh Rayabharam <anrayabh@linux.microsoft.com> > > [ Upstream commit 2982635a0b3d08d6fee2ff05632206286df0e703 ] > > hyperv_cleanup resets the hypercall page by setting the MSR to 0. However, > the root partition is not allowed to write to the GPA bits of the MSR. > Instead, it uses the hypercall page provided by the MSR. Similar is the > case with the reference TSC MSR. > > Clear only the enable bit instead of zeroing the entire MSR to make > the code valid for root partition too. > > Signed-off-by: Anirudh Rayabharam <anrayabh@linux.microsoft.com> > Reviewed-by: Michael Kelley <mikelley@microsoft.com> > Link: https://lore.kernel.org/all/20221027095729.1676394-3-anrayabh@linux.microsoft.com/ > Signed-off-by: Wei Liu <wei.liu@kernel.org> > Signed-off-by: Sasha Levin <sashal@kernel.org> Same with this one -- no stable backports are needed as the patch is more about enabling a new scenario than fixing a bug. Again, Wei Liu or Anirudh should confirm. Michael > --- > arch/x86/hyperv/hv_init.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c > index 3de6d8b53367..10186bd6d67e 100644 > --- a/arch/x86/hyperv/hv_init.c > +++ b/arch/x86/hyperv/hv_init.c > @@ -537,6 +537,7 @@ void __init hyperv_init(void) > void hyperv_cleanup(void) > { > union hv_x64_msr_hypercall_contents hypercall_msr; > + union hv_reference_tsc_msr tsc_msr; > > unregister_syscore_ops(&hv_syscore_ops); > > @@ -552,12 +553,14 @@ void hyperv_cleanup(void) > hv_hypercall_pg = NULL; > > /* Reset the hypercall page */ > - hypercall_msr.as_uint64 = 0; > - wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); > + hypercall_msr.as_uint64 = hv_get_register(HV_X64_MSR_HYPERCALL); > + hypercall_msr.enable = 0; > + hv_set_register(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); > > /* Reset the TSC page */ > - hypercall_msr.as_uint64 = 0; > - wrmsrl(HV_X64_MSR_REFERENCE_TSC, hypercall_msr.as_uint64); > + tsc_msr.as_uint64 = hv_get_register(HV_X64_MSR_REFERENCE_TSC); > + tsc_msr.enable = 0; > + hv_set_register(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64); > } > > void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die) > -- > 2.35.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
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2022-11-19 2:10 ` [PATCH AUTOSEL 6.0 13/44] clocksource/drivers/hyperv: add data structure for reference TSC MSR Sasha Levin
2022-11-19 5:37 ` Michael Kelley (LINUX)
2022-11-24 15:51 ` Sasha Levin
2022-11-25 15:39 ` Wei Liu
2022-11-19 2:10 ` [PATCH AUTOSEL 6.0 14/44] x86/hyperv: fix invalid writes to MSRs during root partition kexec Sasha Levin
2022-11-19 5:37 ` Michael Kelley (LINUX)
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