From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
To: Jean Delvare <jdelvare@suse.com>,
Andi Shyti <andi.shyti@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-i2c@vger.kernel.org, Sanket.Goswami@amd.com
Subject: Re: [PATCH 3/5] i2c: piix4: Add ACPI support for ASF SMBus device
Date: Wed, 4 Sep 2024 01:06:16 +0530 [thread overview]
Message-ID: <34a01d4c-cf05-45e4-924c-e2453ff5f6a3@amd.com> (raw)
In-Reply-To: <20240822142200.686842-4-Shyam-sundar.S-k@amd.com>
+Andy (this has some ACPI handling that adds AMD ASF support to the
existing piix4 driver for SMBus)
On 8/22/2024 19:51, Shyam Sundar S K wrote:
> The AMD ASF controller is presented to the operating system as an ACPI
> device. The piix4 driver can obtain the ASF handle through ACPI to
> retrieve information about the ASF controller's attributes, such as the
> ASF address space and interrupt number, and to handle ASF interrupts.
>
> Currently, the piix4 driver assumes that a specific port address is
> designated for AUX operations. However, with the introduction of ASF, the
> same port address may also be used by the ASF controller. Therefore, a
> check needs to be added to ensure that if ASF is advertised and enabled in
> ACPI, the AUX port is not set up.
>
> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
> drivers/i2c/busses/i2c-piix4.c | 161 ++++++++++++++++++++++++++++++++-
> 1 file changed, 160 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
> index a44b53dd4dd7..00fc641e6277 100644
> --- a/drivers/i2c/busses/i2c-piix4.c
> +++ b/drivers/i2c/busses/i2c-piix4.c
> @@ -121,6 +121,8 @@
> #define SB800_PIIX4_FCH_PM_ADDR 0xFED80300
> #define SB800_PIIX4_FCH_PM_SIZE 8
> #define SB800_ASF_BLOCK_MAX_BYTES 72
> +#define SB800_ASF_ERROR_STATUS 0xE
> +#define SB800_ASF_ACPI_PATH "\\_SB.ASFC"
>
> /* insmod parameters */
>
> @@ -185,6 +187,11 @@ struct sb800_mmio_cfg {
> bool use_mmio;
> };
>
> +struct sb800_asf_data {
> + unsigned short addr;
> + int irq;
> +};
> +
> enum piix4_algo {
> SMBUS_SB800,
> SMBUS_LEGACY,
> @@ -201,6 +208,8 @@ struct i2c_piix4_adapdata {
> struct sb800_mmio_cfg mmio_cfg;
> u8 algo_select;
> struct i2c_client *slave;
> + bool is_asf;
> + struct delayed_work work_buf;
> };
>
> static int piix4_sb800_region_request(struct device *dev,
> @@ -909,6 +918,66 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
> return retval;
> }
>
> +static void sb800_asf_process_slave(struct work_struct *work)
> +{
> + struct i2c_piix4_adapdata *adapdata = container_of(work, struct i2c_piix4_adapdata,
> + work_buf.work);
> + unsigned short piix4_smba = adapdata->smba;
> + u8 data[SB800_ASF_BLOCK_MAX_BYTES];
> + u8 bank, reg, cmd;
> + u8 len, val = 0;
> + int i;
> +
> + /* Read slave status register */
> + reg = inb_p(ASFSLVSTA);
> +
> + /* Check if no error bits are set in slave status register */
> + if (!(reg & SB800_ASF_ERROR_STATUS)) {
> + /* Read data bank */
> + reg = inb_p(ASFDATABNKSEL);
> + bank = (reg & BIT(3)) >> 3;
> +
> + /* Set read data bank */
> + if (bank) {
> + reg = reg | BIT(4);
> + reg = reg & (~BIT(3));
> + } else {
> + reg = reg & (~BIT(4));
> + reg = reg & (~BIT(2));
> + }
> +
> + /* Read command register */
> + outb_p(reg, ASFDATABNKSEL);
> + cmd = inb_p(ASFINDEX);
> + len = inb_p(ASFDATARWPTR);
> + for (i = 0; i < len; i++)
> + data[i] = inb_p(ASFINDEX);
> +
> + /* Clear data bank status */
> + if (bank) {
> + reg = reg | BIT(3);
> + outb_p(reg, ASFDATABNKSEL);
> + } else {
> + reg = reg | BIT(2);
> + outb_p(reg, ASFDATABNKSEL);
> + }
> + } else {
> + /* Set bank as full */
> + reg = reg | (BIT(3) | BIT(2));
> + outb_p(reg, ASFDATABNKSEL);
> + }
> +
> + outb_p(0, ASFSETDATARDPTR);
> + if (!(cmd & BIT(0))) {
> + i2c_slave_event(adapdata->slave, I2C_SLAVE_WRITE_REQUESTED, &val);
> + for (i = 0; i < len; i++) {
> + val = data[i];
> + i2c_slave_event(adapdata->slave, I2C_SLAVE_WRITE_RECEIVED, &val);
> + }
> + i2c_slave_event(adapdata->slave, I2C_SLAVE_STOP, &val);
> + }
> +}
> +
> static void sb800_asf_update_bits(unsigned short piix4_smba, u8 bit, unsigned long offset, bool set)
> {
> unsigned long reg;
> @@ -1195,6 +1264,86 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
> return 0;
> }
>
> +static irqreturn_t sb800_asf_irq_handler(int irq, void *ptr)
> +{
> + struct i2c_piix4_adapdata *adapdata = (struct i2c_piix4_adapdata *)ptr;
> + unsigned short piix4_smba = adapdata->smba;
> + u8 slave_int = inb_p(ASFSTA);
> +
> + if ((slave_int & BIT(6))) {
> + /* Slave Interrupt */
> + outb_p(slave_int | BIT(6), ASFSTA);
> + schedule_delayed_work(&adapdata->work_buf, HZ);
> + } else {
> + /* Master Interrupt */
> + sb800_asf_update_bits(piix4_smba, SB800_ASF_SLV_INTR, SMBHSTSTS, true);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static acpi_status sb800_asf_acpi_resource_cb(struct acpi_resource *resource, void *context)
> +{
> + struct sb800_asf_data *data = context;
> +
> + switch (resource->type) {
> + case ACPI_RESOURCE_TYPE_EXTENDED_IRQ:
> + data->irq = resource->data.extended_irq.interrupts[0];
> + break;
> + case ACPI_RESOURCE_TYPE_IO:
> + data->addr = resource->data.io.minimum;
> + break;
> + }
> +
> + return AE_OK;
> +}
> +
> +static int sb800_asf_add_adap(struct pci_dev *dev)
> +{
> + struct i2c_piix4_adapdata *adapdata;
> + struct sb800_asf_data *data;
> + acpi_status status;
> + acpi_handle handle;
> + int ret;
> +
> + status = acpi_get_handle(NULL, SB800_ASF_ACPI_PATH, &handle);
> + if (ACPI_FAILURE(status))
> + return -ENODEV;
> +
> + data = devm_kzalloc(&dev->dev, sizeof(struct sb800_asf_data), GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + status = acpi_walk_resources(handle, METHOD_NAME__CRS, sb800_asf_acpi_resource_cb, data);
> + if (ACPI_FAILURE(status))
> + return -EINVAL;
> +
> + if (!data->addr)
> + return -EINVAL;
> +
> + ret = piix4_add_adapter(dev, data->addr, SMBUS_ASF, piix4_adapter_count, false, 0,
> + piix4_main_port_names_sb800[piix4_adapter_count],
> + &piix4_main_adapters[piix4_adapter_count]);
> + if (ret) {
> + dev_err(&dev->dev, "Failed to add ASF adapter: %d\n", ret);
> + return -ENODEV;
> + }
> +
> + adapdata = i2c_get_adapdata(piix4_main_adapters[piix4_adapter_count]);
> + ret = devm_request_irq(&dev->dev, data->irq, sb800_asf_irq_handler, IRQF_SHARED,
> + "sb800_smbus_asf", adapdata);
> + if (ret) {
> + dev_err(&dev->dev, "Unable to request irq: %d for use\n", data->irq);
> + return ret;
> + }
> +
> + INIT_DELAYED_WORK(&adapdata->work_buf, sb800_asf_process_slave);
> + adapdata->is_asf = true;
> + /* Increment the adapter count by 1 as ASF is added to the list */
> + piix4_adapter_count += 1;
> + return 1;
> +}
> +
> static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba,
> bool notify_imc)
> {
> @@ -1243,6 +1392,7 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
> {
> int retval;
> bool is_sb800 = false;
> + bool is_asf = false;
>
> if ((dev->vendor == PCI_VENDOR_ID_ATI &&
> dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
> @@ -1279,6 +1429,10 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
> retval = piix4_add_adapters_sb800(dev, retval, notify_imc);
> if (retval < 0)
> return retval;
> +
> + /* Check if ASF is enabled in SB800 */
> + if (sb800_asf_add_adap(dev))
> + is_asf = true;
> } else {
> retval = piix4_setup(dev, id);
> if (retval < 0)
> @@ -1308,7 +1462,9 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
> if (dev->vendor == PCI_VENDOR_ID_AMD &&
> (dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS ||
> dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)) {
> - retval = piix4_setup_sb800(dev, id, 1);
> + /* Do not setup AUX port if ASF is enabled */
> + if (!is_asf)
> + retval = piix4_setup_sb800(dev, id, 1);
> }
>
> if (retval > 0) {
> @@ -1326,6 +1482,9 @@ static void piix4_adap_remove(struct i2c_adapter *adap)
> {
> struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
>
> + if (adapdata->is_asf)
> + cancel_delayed_work_sync(&adapdata->work_buf);
> +
> if (adapdata->smba) {
> i2c_del_adapter(adap);
> if (adapdata->port == (0 << piix4_port_shift_sb800))
next prev parent reply other threads:[~2024-09-03 19:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-22 14:21 [PATCH 0/5] Add ASF Controller Support to the i2c-piix4 driver Shyam Sundar S K
2024-08-22 14:21 ` [PATCH 1/5] i2c: piix4: Allow more than two algo selection for SMBus Shyam Sundar S K
2024-09-03 21:49 ` Andi Shyti
2024-08-22 14:21 ` [PATCH 2/5] i2c: piix4: Add i2c_algorithm operations to support AMD ASF with SMBus Shyam Sundar S K
2024-08-26 10:54 ` kernel test robot
2024-08-26 11:04 ` kernel test robot
2024-08-22 14:21 ` [PATCH 3/5] i2c: piix4: Add ACPI support for ASF SMBus device Shyam Sundar S K
2024-08-26 10:54 ` kernel test robot
2024-09-03 19:36 ` Shyam Sundar S K [this message]
2024-09-03 20:06 ` Andy Shevchenko
2024-09-04 11:03 ` Shyam Sundar S K
2024-08-22 14:21 ` [PATCH 4/5] i2c: piix4: Adjust the SMBus debug message Shyam Sundar S K
2024-09-03 21:51 ` Andi Shyti
2024-09-04 11:01 ` Shyam Sundar S K
2024-08-22 14:22 ` [PATCH 5/5] i2c: piix4: Clear remote IRR bit to get successive interrupt Shyam Sundar S K
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=34a01d4c-cf05-45e4-924c-e2453ff5f6a3@amd.com \
--to=shyam-sundar.s-k@amd.com \
--cc=Sanket.Goswami@amd.com \
--cc=andi.shyti@kernel.org \
--cc=andriy.shevchenko@linux.intel.com \
--cc=jdelvare@suse.com \
--cc=linux-i2c@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox