Linux I2C development
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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>,
	Robert Foss <rfoss@kernel.org>,
	Andi Shyti <andi.shyti@kernel.org>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Luca Weiss <luca@lucaweiss.eu>
Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, vladimir.zapolskiy@linaro.org,
	konradybcio@kernel.org, stephan.gerhold@linaro.org,
	Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Subject: Re: [PATCH v4 5/5] i2c: qcom-cci: Enforce the required CCI clock rate
Date: Tue, 18 Aug 2026 14:16:10 +0200	[thread overview]
Message-ID: <5a7ecb83-a01c-4136-bffa-96c64e77c5e9@oss.qualcomm.com> (raw)
In-Reply-To: <20260801-cci-clk-fix-v4-5-e1d80da54e01@oss.qualcomm.com>

On 8/1/26 10:10 PM, Loic Poulain wrote:
> The CCI hw_params timing values are only valid at the specific clock
> rate they were calibrated for. A previous change made the driver select
> the timing set matching the currently running clock rate, but the rate
> itself was still left to the DT (assigned-clock-rates) or the bootloader,
> which is fragile: if no rate is enforced the timings may not match and
> violate the I2C specification.

[...]

> +/*
> + * The single CCI clock is shared by all masters, which may run in different
> + * modes. Pick the lowest rate that has a valid timing set for every active
> + * master's mode.> + */
> +static unsigned long cci_get_required_rate(struct cci *cci)
> +{
> +	int ri, i;

Please declare the loop iterators in the loop 'header', it's been
OKd inside the kernel for a while now

> +
> +	for (ri = 0; ri < NUM_CCI_CLK_RATES; ri++) {
> +		bool supported = true;
> +
> +		for (i = 0; i < cci->data->num_masters; i++) {
> +			int mode = cci->master[i].mode;
> +
> +			if (!cci->master[i].cci)
> +				continue;
> +
> +			if (mode > cci->data->max_mode ||
> +			    !cci_hw_params[ri][mode].thigh) {
> +				supported = false;
> +				break;
> +			}

This still goes to dev_pm_opp_set_rate() with a value of 0, which is
BAD - let's check the retval of this function and pass the rate via a
pointer parameter

> +		}
> +
> +		if (supported)
> +			return cci_clk_rates[ri];
> +	}
> +
> +	return 0;
> +}
> +
> +static int cci_set_core_rate(struct cci *cci, unsigned long rate)
> +{
> +	struct device *dev = cci->dev;
> +	int ret;
> +
> +	ret = dev_pm_opp_set_rate(dev, rate);
> +	if (ret) {
> +		dev_warn(dev, "CCI clock could not be set to %lu Hz\n", rate);
> +		return ret;
> +	}
> +
> +	if (!rate)
> +		return 0;
> +
> +	/*
> +	 * Sanity: The hw_params timings are only valid at the exact
> +	 * expected rate, verify what landed on the hardware.
> +	 */
> +	if (clk_get_rate(cci->cci_clk) != rate)
> +		dev_warn(dev, "CCI clock is not at expected %lu Hz\n", rate);
> +
> +	return 0;
> +}
> +
>  static int __maybe_unused cci_suspend_runtime(struct device *dev)
>  {
>  	struct cci *cci = dev_get_drvdata(dev);
>  
> +	cci_set_core_rate(cci, 0);

No, that's a footgun

https://lore.kernel.org/linux-arm-msm/20260728-topic-dpu_power-v1-0-e7783b859a70@oss.qualcomm.com/

>  	cci_disable_clocks(cci);
>  	return 0;
>  }
> @@ -588,6 +646,10 @@ static int __maybe_unused cci_resume_runtime(struct device *dev)
>  	struct cci *cci = dev_get_drvdata(dev);
>  	int ret;
>  
> +	ret = cci_set_core_rate(cci, cci_get_required_rate(cci));
> +	if (ret)
> +		return ret;

You generally only need to set_rate once and then enable/disable the clocks,
so this can be removed

Konrad

      reply	other threads:[~2026-08-18 12:16 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-01 20:10 [PATCH v4 0/5] i2c: qcom-cci: Enforce the required CCI clock rate Loic Poulain
2026-08-01 20:10 ` [PATCH v4 1/5] i2c: qcom-cci: Switch msm8953 to the CCI v2 timing/rate config Loic Poulain
2026-08-18 11:54   ` Konrad Dybcio
2026-08-19 11:10   ` Vladimir Zapolskiy
2026-08-01 20:10 ` [PATCH v4 2/5] i2c: qcom-cci: Support per-mode CCI clock rates Loic Poulain
2026-08-18 11:59   ` Konrad Dybcio
2026-08-19 11:24   ` Vladimir Zapolskiy
2026-08-01 20:10 ` [PATCH v4 3/5] i2c: qcom-cci: Add 19.2 MHz timings for the v2 CCI Loic Poulain
2026-08-18 12:06   ` Konrad Dybcio
2026-08-19 11:26   ` Vladimir Zapolskiy
2026-08-01 20:10 ` [PATCH v4 4/5] i2c: qcom-cci: Share the timing table across CCI revisions Loic Poulain
2026-08-18 12:07   ` Konrad Dybcio
2026-08-19 11:30   ` Vladimir Zapolskiy
2026-08-27  9:31     ` Loic Poulain
2026-08-27  9:47       ` Loic Poulain
2026-08-01 20:10 ` [PATCH v4 5/5] i2c: qcom-cci: Enforce the required CCI clock rate Loic Poulain
2026-08-18 12:16   ` Konrad Dybcio [this message]

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