Re: i2c: designware: unhandled interrupt on N100 lpss channel 0

[Heiner Kallweit <hkallweit1@gmail.com>]

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On 21.03.2024 12:20, Andy Shevchenko wrote:
> On Wed, Mar 20, 2024 at 10:26:06PM +0100, Heiner Kallweit wrote:
>> On 20.03.2024 22:07, Andy Shevchenko wrote:
>>> On Wed, Mar 20, 2024 at 09:21:34PM +0100, Heiner Kallweit wrote:
>>>> On 20.03.2024 16:59, Andy Shevchenko wrote:
>>>>> On Wed, Mar 20, 2024 at 03:56:29PM +0100, Heiner Kallweit wrote:
> 
> ...
> 
>>>>>   grep 0000001b /sys/kernel/debug/pinctrl/*/pins
>>>>
>>>> pin 3 (GPPC_B_3) 3:INTC1057:00 GPIO 0x80100102 0x0000001b 0x00000000 [LOCKED tx]
>>>> pin 82 (GPP_F_7_EMMC_CMD) 135:INTC1057:00 GPIO 0x44000300 0x0000001b 0x00000000 [LOCKED full, ACPI]
>>>> pin 182 (GPPC_C_13) 269:INTC1057:00 GPIO 0x44000300 0x0000001b 0x00000000 [LOCKED full, ACPI]
>>>
>>> I was not correct, the value to grep is '0000[0-3][0-9a-f]1b' as there pull
>>> up/down can be enabled.
>>>
>> Result is the same
>>
>>> Nevertheless from the above the pin 3 is one that is enabled as GPIO input with
>>> RTE 27 and direct IRQ.  If it's a culprit, try to add in the pinctrl-intel.c at
>>> the end of .probe:
>>>
>>> 	{
>>> 		void __iomem *padcfg0;
>>> 	        u32 value;
>>>
>>> 		padcfg0 = intel_get_padcfg(pctrl, 3, PADCFG0);
>>>
>>> 		value = readl(padcfg0);
>>> 		value |= PADCFG0_GPIOTXDIS;
>>> 		value |= PADCFG0_GPIORXDIS;
>>> 		writel(value, padcfg0);
>>> 	}
>>>
>>> If it helps, it will show the BIOS bug (likely).
>>>
>> Wow, this indeed fixes the issue for me. Thanks a lot!
> 
> Wow! Glad to hear this.
> (Side note, can you test the patch against idma64 I sent yesterday?
>  Tested-by tag will be appreciated!)
> 
Done, sent the Tested-by

> We may try to have the quirk in the kernel, but it might be (quite) tricky
> (see the link below).
> 
> Can you share `acpidump -o n100-tables.dat` (the file) somewhere?
> I would like to see if this pin is anyhow being mentioned in the DSDT.
> 
Attached. Compressed file isn't that big, so hope it's ok to send it
as an attachment.

>> For my understanding: Shall we (kernel driver) rely on the BIOS to configure
>> GPIO's properly?
> 
> Yes, but there are bugs.
> You may look, e.g., https://bugzilla.kernel.org/show_bug.cgi?id=214749.
> 
>> Or better assume that GPIO's are in an unknown state on
>> driver load and configure them for our needs?
> 
> It depends. But usually (> 99% cases) we rely on the firmware.
> 
>> IOW: If we assume that other systems may have similar issues, should
>> "some driver" use e.g. the pinctrl API to configure relevant pins?
> 
> 

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