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From: Heiner Kallweit <hkallweit1@gmail.com>
To: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc: "linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>,
	Andi Shyti <andi.shyti@kernel.org>
Subject: Re: i2c: designware: unhandled interrupt on N100 lpss channel 0
Date: Wed, 20 Mar 2024 13:27:35 +0100	[thread overview]
Message-ID: <af839910-2c3d-4559-b8b3-1c6f2372144e@gmail.com> (raw)
In-Reply-To: <e3f2debf-c762-48d9-876e-bcb60841f909@gmail.com>

On 19.03.2024 22:11, Heiner Kallweit wrote:
> On a N100-based mini pc I see the following. I found older reports with the same symptom,
> but root cause seems to be different.
> 
> - Interrupt 27 is not shared in my case
> - I checked register values on entering the ISR. Interrupt mask and DW_IC_RAW_INTR_STAT
>   are both 0.
> - After an interrupt storm of 100,000 interrupts the interrupt gets disabled
> - The issue affects channel 0 only
> 
> If not the I2C IP, then who else can touch the interrupt line?

I noticed that after including INTEL_IDMA64 in my config the problem no longer occurs.
So there seems to be a dependency. Should it be reflected in Kconfig, e.g.
make MFD_INTEL_LPSS dependent on INTEL_IDMA64, or let it imply INTEL_IDMA64?

> May the BIOS play a role here? I have few ACPI errors on boot, and it seems the vendor
> of this dirt-cheap device didn't give much love to the BIOS.
> 
> 
> [    5.228854] irq 27: nobody cared (try booting with the "irqpoll" option)
> [    5.228929] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 6.8.0-next-20240312+ #4
> [    5.228981] Hardware name: Default string Default string/Default string, BIOS ADLN.M6.SODIMM.ZB.CY.015 08/08/2023
> [    5.229045] Call Trace:
> [    5.229065]  <IRQ>
> [    5.229084]  dump_stack_lvl+0x81/0xe0
> [    5.229125]  dump_stack+0x10/0x20
> [    5.229154]  __report_bad_irq+0x2b/0xc0
> [    5.229190]  note_interrupt+0x28f/0x2d0
> [    5.229220]  ? __this_cpu_preempt_check+0x13/0x20
> [    5.229262]  handle_irq_event+0x70/0x80
> [    5.229296]  handle_fasteoi_irq+0x90/0x210
> [    5.229331]  __common_interrupt+0x6f/0x140
> [    5.229369]  common_interrupt+0xab/0xd0
> [    5.229403]  </IRQ>
> [    5.229420]  <TASK>
> [    5.229440]  asm_common_interrupt+0x27/0x40
> [    5.229476] RIP: 0010:cpuidle_enter_state+0xff/0x4f0
> [    5.229516] Code: 8b 00 48 0f a3 05 c1 7f 9d 00 0f 82 fd 02 00 00 31 ff e8 a4 03 6a ff 80 7d cf 00 0f 85 cc 02 00 00 e8 15 e0 77 ff fb 45 85 ff <0f> 88 f4 01 00 00 49 63 f7 4c 89 f2 48 8d 04 76 48 8d 04 86 49 8d
> [    5.229627] RSP: 0018:ffffa6c44016fe58 EFLAGS: 00000202
> [    5.229668] RAX: 000000000007a19b RBX: ffffc6c43fcac660 RCX: 0000000000000000
> [    5.229715] RDX: 0000000000000000 RSI: ffffffff89323d8f RDI: ffffffff8930f62b
> [    5.229760] RBP: ffffa6c44016fe98 R08: 0000000000000001 R09: 0000000000000000
> [    5.229806] R10: 0000000000000001 R11: ffffa2a0b7aad824 R12: 0000000000000001
> [    5.229851] R13: ffffffff895b69a0 R14: 0000000137a9c564 R15: 0000000000000001
> [    5.229907]  ? cpuidle_enter_state+0xfb/0x4f0
> [    5.229946]  cpuidle_enter+0x29/0x40
> [    5.229978]  call_cpuidle+0x1d/0x40
> [    5.230010]  do_idle+0x1c2/0x220
> [    5.230040]  cpu_startup_entry+0x24/0x30
> [    5.230072]  start_secondary+0xf9/0x100
> [    5.230105]  common_startup_64+0x13e/0x148
> [    5.230148]  </TASK>
> [    5.230166] handlers:
> [    5.230185] [<00000000a498cda6>] i2c_dw_isr [i2c_designware_core]
> [    5.230354] Disabling IRQ #27
> 
> 
>             CPU0       CPU1       CPU2       CPU3
>    8:          0          0          0          0  IR-IO-APIC    8-edge      rtc0
>    9:          0         51          0          0  IR-IO-APIC    9-fasteoi   acpi
>   16:          0          3          0          0  IR-IO-APIC   16-fasteoi   i801_smbus
>   27:          0     100000          0          0  IR-IO-APIC   27-fasteoi   i2c_designware.0
>   29:          0          0          0          0  IR-IO-APIC   29-fasteoi   i2c_designware.2
>   31:          0          0          0          0  IR-IO-APIC   31-fasteoi   i2c_designware.4
>   32:          0          0          0          0  IR-IO-APIC   32-fasteoi   i2c_designware.5
>   33:          0          0          0          0  IR-IO-APIC   33-fasteoi   i2c_designware.3
>   40:          0          0          0          0  IR-IO-APIC   40-fasteoi   i2c_designware.1
> 
> Thanks, Heiner


  reply	other threads:[~2024-03-20 12:27 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-19 21:11 i2c: designware: unhandled interrupt on N100 lpss channel 0 Heiner Kallweit
2024-03-20 12:27 ` Heiner Kallweit [this message]
2024-03-20 13:37   ` Jarkko Nikula
2024-03-20 14:15     ` Andy Shevchenko
2024-03-20 14:56       ` Heiner Kallweit
2024-03-20 15:59         ` Andy Shevchenko
2024-03-20 20:21           ` Heiner Kallweit
2024-03-20 21:07             ` Andy Shevchenko
2024-03-20 21:21               ` Andy Shevchenko
2024-03-20 21:26               ` Heiner Kallweit
2024-03-20 21:28                 ` Heiner Kallweit
2024-03-21 11:20                 ` Andy Shevchenko
2024-03-21 11:59                   ` Heiner Kallweit
2024-03-21 17:33                     ` Andy Shevchenko
2024-03-21 21:00                       ` Heiner Kallweit
2024-03-22 16:18                         ` Andy Shevchenko
2024-03-22 19:28                           ` Heiner Kallweit
2024-04-02 20:46                             ` Andy Shevchenko
2024-04-05 16:01                               ` Andy Shevchenko
2024-04-05 19:21                                 ` Heiner Kallweit

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