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From: Andrew Lunn <andrew@lunn.ch>
To: Jiawen Wu <jiawenwu@trustnetic.com>
Cc: 'Andy Shevchenko' <andy.shevchenko@gmail.com>,
	netdev@vger.kernel.org, jarkko.nikula@linux.intel.com,
	andriy.shevchenko@linux.intel.com,
	mika.westerberg@linux.intel.com, jsd@semihalf.com,
	Jose.Abreu@synopsys.com, hkallweit1@gmail.com,
	linux@armlinux.org.uk, linux-i2c@vger.kernel.org,
	linux-gpio@vger.kernel.org, mengyuanlou@net-swift.com
Subject: Re: [PATCH net-next v8 6/9] net: txgbe: Support GPIO to SFP socket
Date: Wed, 17 May 2023 17:00:49 +0200	[thread overview]
Message-ID: <90ef7fb8-feac-4288-98e9-6e67cd38cdf1@lunn.ch> (raw)
In-Reply-To: <016701d9886a$f9b415a0$ed1c40e0$@trustnetic.com>

On Wed, May 17, 2023 at 10:55:01AM +0800, Jiawen Wu wrote:
> > > > > +   gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
> > > > > +   if (!gc)
> > > > > +           return -ENOMEM;
> > > > > +
> > > > > +   gc->label = devm_kasprintf(dev, GFP_KERNEL, "txgbe_gpio-%x",
> > > > > +                              (wx->pdev->bus->number << 8) | wx->pdev->devfn);
> > > > > +   gc->base = -1;
> > > > > +   gc->ngpio = 6;
> > > > > +   gc->owner = THIS_MODULE;
> > > > > +   gc->parent = dev;
> > > > > +   gc->fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_GPIO]);
> > > >
> > > > Looking at the I²C case, I'm wondering if gpio-regmap can be used for this piece.
> > >
> > > I can access this GPIO region directly, do I really need to use regmap?
> > 
> > It's not a matter of access, it's a matter of using an existing
> > wrapper that will give you already a lot of code done there, i.o.w.
> > you don't need to reinvent a wheel.
> 
> I took a look at the gpio-regmap code, when I call devm_gpio_regmap_register(),
> I should provide gpio_regmap_config.irq_domain if I want to add the gpio_irq_chip.
> But in this use, GPIO IRQs are requested by SFP driver. How can I get irq_domain
> before SFP probe? And where do I add IRQ parent handler?
 
I _think_ you are mixing upstream IRQs and downstream IRQs.

Interrupts are arranged in trees. The CPU itself only has one or two
interrupts. e.g. for ARM you have FIQ and IRQ. When the CPU gets an
interrupt, you look in the interrupt controller to see what external
or internal interrupt triggered the CPU interrupt. And that interrupt
controller might indicate the interrupt came from another interrupt
controller. Hence the tree structure. And each node in the tree is
considered an interrupt domain.

A GPIO controller can also be an interrupt controller. It has an
upstream interrupt, going to the controller above it. And it has
downstream interrupts, the GPIO lines coming into it which can cause
an interrupt. And the GPIO interrupt controller is a domain.

So what exactly does gpio_regmap_config.irq_domain mean? Is it the
domain of the upstream interrupt controller? Is it an empty domain
structure to be used by the GPIO interrupt controller? It is very
unlikely to have anything to do with the SFP devices below it.

	 Andrew




  parent reply	other threads:[~2023-05-17 15:37 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-15  6:31 [PATCH net-next v8 0/9] TXGBE PHYLINK support Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 1/9] net: txgbe: Add software nodes to support phylink Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 2/9] i2c: designware: Add driver support for Wangxun 10Gb NIC Jiawen Wu
2023-05-15  9:24   ` andy.shevchenko
2023-05-17  8:49     ` Jarkko Nikula
2023-05-17  9:25       ` Jiawen Wu
2023-05-17  9:44         ` Andy Shevchenko
2023-05-19 13:26           ` Jarkko Nikula
2023-05-17  9:40       ` Andy Shevchenko
2023-05-15  6:31 ` [PATCH net-next v8 3/9] net: txgbe: Register fixed rate clock Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 4/9] net: txgbe: Register I2C platform device Jiawen Wu
2023-05-15  9:29   ` andy.shevchenko
2023-05-15  6:31 ` [PATCH net-next v8 5/9] net: txgbe: Add SFP module identify Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 6/9] net: txgbe: Support GPIO to SFP socket Jiawen Wu
2023-05-15  9:42   ` andy.shevchenko
2023-05-16  2:38     ` Jiawen Wu
2023-05-16  7:12       ` Andy Shevchenko
2023-05-16  9:39         ` Paolo Abeni
2023-05-16 10:31           ` Russell King (Oracle)
2023-05-17  2:55         ` Jiawen Wu
2023-05-17 10:26           ` Andy Shevchenko
2023-05-17 15:00           ` Andrew Lunn [this message]
2023-05-18 11:49             ` Jiawen Wu
2023-05-18 12:27               ` Andy Shevchenko
2023-05-18 16:02                 ` Michael Walle
2023-05-18 16:07                   ` Andy Shevchenko
2023-05-23  9:55                 ` Jiawen Wu
2023-05-23 11:07                   ` Andy Shevchenko
2023-05-23 11:10                     ` Andy Shevchenko
2023-05-18 12:48               ` Andrew Lunn
2023-05-19  2:25                 ` Jiawen Wu
2023-05-19 13:13                   ` Andrew Lunn
2023-05-22  9:00                     ` Jiawen Wu
2023-05-22  9:06                       ` Jiawen Wu
2023-05-22 10:58                       ` Jiawen Wu
2023-05-22 21:36                         ` 'Andy Shevchenko'
2023-05-23  2:08                           ` Jiawen Wu
2023-05-23  6:12                       ` Jiawen Wu
2023-05-19  8:24                 ` Jiawen Wu
2023-05-19 13:24                   ` Andrew Lunn
2023-05-15 21:36   ` Andy Shevchenko
2023-05-16  2:05     ` Jiawen Wu
2023-05-17 10:29       ` 'Andy Shevchenko'
2023-05-15  6:31 ` [PATCH net-next v8 7/9] net: pcs: Add 10GBASE-R mode for Synopsys Designware XPCS Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 8/9] net: txgbe: Implement phylink pcs Jiawen Wu
2023-05-16  2:45   ` Lars-Peter Clausen
2023-05-15  6:32 ` [PATCH net-next v8 9/9] net: txgbe: Support phylink MAC layer Jiawen Wu
2023-05-16  9:43   ` Paolo Abeni

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