Re: [PATCH 4/4] arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on CCI busses

["Luca Weiss" <luca.weiss@fairphone.com>]

On Mon Jan 19, 2026 at 11:42 AM CET, Konrad Dybcio wrote:
> On 1/16/26 3:54 PM, Luca Weiss wrote:
>> On Fri Jan 16, 2026 at 2:59 PM CET, Konrad Dybcio wrote:
>>> On 1/16/26 2:38 PM, Luca Weiss wrote:
>>>> Enable the CCI I2C busses and add nodes for the EEPROMs found on the
>>>> camera that are connected there.
>>>>
>>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>>>> ---
>>>>  arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts | 50 ++++++++++++++++++++++++
>>>>  1 file changed, 50 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
>>>> index 7629ceddde2a..c4a706e945ba 100644
>>>> --- a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
>>>> +++ b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
>>>> @@ -529,6 +529,56 @@ vreg_l11f: ldo11 {
>>>>  	};
>>>>  };
>>>>  
>>>> +&cci0 {
>>>> +	status = "okay";
>>>> +};
>>>> +
>>>> +&cci0_i2c0 {
>>>> +	/* Main cam: Sony IMX896 @ 0x1a */
>>>> +
>>>> +	eeprom@50 {
>>>> +		compatible = "puya,p24c128f", "atmel,24c128";
>>>> +		reg = <0x50>;
>>>> +		vcc-supply = <&vreg_l6p>;
>>>> +		read-only;
>>>> +	};
>>>> +
>>>> +	/* Dongwoon DW9784 VCM/OIS @ 0x72 */
>>>> +};
>>>> +
>>>> +
>>>> +&cci0_i2c1 {
>>>> +	/* Awinic AW86017 VCM @ 0x0c */
>>>> +	/* UW cam: OmniVision OV13B10 @ 0x36 */
>>>
>>> There's a driver for this one!
>> 
>> Yep! Already got patches to add the required regulators & devicetree
>> support to the driver, but since I've got zero on CAMSS so far, I
>> couldn't test it more than reading chip ID.
>
> That means the digital part works.. I'd say it's a good enough
> indicator
>
>>>> +
>>>> +	eeprom@52 {
>>>> +		compatible = "puya,p24c128f", "atmel,24c128";
>>>> +		reg = <0x52>;
>>>> +		vcc-supply = <&vreg_l6p>;
>>>> +		read-only;
>>>> +	};
>>>> +};
>>>> +
>>>> +&cci1 {
>>>> +	/* cci1_i2c0 is not used for CCI */
>>>> +	pinctrl-0 = <&cci1_1_default>;
>>>> +	pinctrl-1 = <&cci1_1_sleep>;
>>>
>>> Let's keep them per-bus-subnode so we don't have to override it
>> 
>> I don't see any upstream example of that, would the pinctrl work
>> correctly with that?
>
> Hmm.. I assumed it would.. and I assumed we do have examples but
> ma-a-aybe they got stuck somewhere in the review purgatory?
>
> If you'd be inclined to test that, you can add a pr_err() to e.g.
> msm_pinmux_set_mux() and observe whether that changes as you
> interact with the sensor over i2c

Yeah that doesn't work. With the following diff I just get some CCI
timeouts and at24 driver doesn't probe correctly. I'd prefer not to do
some yak shaving to get this patch upstream.

Regards
Luca

diff --git a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
index b6cd95fc294e..9f9410615aea 100644
--- a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
+++ b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
@@ -671,10 +671,6 @@ eeprom@52 {
 };
 
 &cci1 {
-	/* cci1_i2c0 is not used for CCI */
-	pinctrl-0 = <&cci1_1_default>;
-	pinctrl-1 = <&cci1_1_sleep>;
-
 	status = "okay";
 };
 
diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
index adf050600a4e..a2438cf60271 100644
--- a/arch/arm64/boot/dts/qcom/milos.dtsi
+++ b/arch/arm64/boot/dts/qcom/milos.dtsi
@@ -1755,9 +1755,6 @@ cci0: cci@ac15000 {
 			clock-names = "soc_ahb",
 				      "cpas_ahb",
 				      "cci";
-			pinctrl-0 = <&cci0_0_default &cci0_1_default>;
-			pinctrl-1 = <&cci0_0_sleep &cci0_1_sleep>;
-			pinctrl-names = "default", "sleep";
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -1765,6 +1762,9 @@ cci0: cci@ac15000 {
 			cci0_i2c0: i2c-bus@0 {
 				reg = <0>;
 				clock-frequency = <1000000>;
+				pinctrl-0 = <&cci0_0_default>;
+				pinctrl-1 = <&cci0_0_sleep>;
+				pinctrl-names = "default", "sleep";
 				#address-cells = <1>;
 				#size-cells = <0>;
 			};
@@ -1772,6 +1772,9 @@ cci0_i2c0: i2c-bus@0 {
 			cci0_i2c1: i2c-bus@1 {
 				reg = <1>;
 				clock-frequency = <1000000>;
+				pinctrl-0 = <&cci0_1_default>;
+				pinctrl-1 = <&cci0_1_sleep>;
+				pinctrl-names = "default", "sleep";
 				#address-cells = <1>;
 				#size-cells = <0>;
 			};
@@ -1788,9 +1791,6 @@ cci1: cci@ac16000 {
 			clock-names = "soc_ahb",
 				      "cpas_ahb",
 				      "cci";
-			pinctrl-0 = <&cci1_0_default &cci1_1_default>;
-			pinctrl-1 = <&cci1_0_sleep &cci1_1_sleep>;
-			pinctrl-names = "default", "sleep";
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -1798,6 +1798,9 @@ cci1: cci@ac16000 {
 			cci1_i2c0: i2c-bus@0 {
 				reg = <0>;
 				clock-frequency = <1000000>;
+				pinctrl-0 = <&cci1_0_default>;
+				pinctrl-1 = <&cci1_0_sleep>;
+				pinctrl-names = "default", "sleep";
 				#address-cells = <1>;
 				#size-cells = <0>;
 			};
@@ -1805,6 +1808,9 @@ cci1_i2c0: i2c-bus@0 {
 			cci1_i2c1: i2c-bus@1 {
 				reg = <1>;
 				clock-frequency = <1000000>;
+				pinctrl-0 = <&cci1_1_default>;
+				pinctrl-1 = <&cci1_1_sleep>;
+				pinctrl-names = "default", "sleep";
 				#address-cells = <1>;
 				#size-cells = <0>;
 			};