Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Tue, Dec 20, 2022 at 04:48:06PM +0000, Hanna Hawa wrote:
> From: Lareine Khawaly <lareine@amazon.com>
> 
> In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
> by depending on the values of the given parameters including the ic_clk.
> For example in our use case where ic_clk is larger than one million,
> multiplication of ic_clk * 4700 will result in 32 bit overflow.
> 
> Add cast of u64 to the calculation to avoid multiplication overflow, and
> use the corresponding define for divide.

...

> -		return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
> +		return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) - 8 +
> +			offset;

Broken indentation.

...

> -		return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
> +		return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf),
> +					     MICRO) - 3 + offset;

I would still go with 'MICRO) -' part to be on the previous line despite being
over 80, this is logical split which increases readability.

> -	return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
> +	return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - 1 +
> +		offset;

Broken indentation.

-- 
With Best Regards,
Andy Shevchenko