From: Tao Ren <taoren@fb.com>
To: Ryan Chen <ryan_chen@aspeedtech.com>,
Brendan Higgins <brendanhiggins@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree <devicetree@vger.kernel.org>,
"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
OpenBMC Maillist <openbmc@lists.ozlabs.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
"linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor
Date: Thu, 20 Jun 2019 07:57:26 +0000 [thread overview]
Message-ID: <bdd53adb-6987-1b91-adde-298839b2c066@fb.com> (raw)
In-Reply-To: <c610ecede7494c189a92a9a3f6d0fd16@TWMBX02.aspeed.com>
On 6/20/19 12:29 AM, Ryan Chen wrote:
> Hello Tao,
> Our recommend about clk divider setting is follow the datasheet clock setting table for clock divisor.
>
> Ryan
Thanks Ryan for the response. Could you also share some recommendations/hints on how to solve the intermittent i2c transaction failures on Facebook AST2500 BMC platforms?
BTW, the patch is not aimed at modifying the existing formula of calculating clock settings in i2c-aspeed driver: people still get the recommended settings by default. The goal of the patch is to allow people to customize clock settings in case the default/recommended one doesn't work.
Cheers,
Tao
next prev parent reply other threads:[~2019-06-20 7:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-19 20:50 [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor Tao Ren
2019-06-19 21:25 ` Brendan Higgins
2019-06-19 22:32 ` Tao Ren
2019-06-19 23:02 ` Benjamin Herrenschmidt
2019-06-20 2:28 ` Tao Ren
2019-06-20 7:29 ` Ryan Chen
2019-06-20 7:57 ` Tao Ren [this message]
2019-06-20 8:01 ` Ryan Chen
2019-06-20 8:13 ` Tao Ren
2019-06-21 22:21 ` [Potential Spoof] " Tao Ren
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