From: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
<alexandre.belloni@bootlin.com>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<jarkko.nikula@linux.intel.com>, <linux-i3c@lists.infradead.org>,
<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 2/3] i3c: master: Add Qualcomm I3C master controller driver
Date: Mon, 10 Feb 2025 21:41:28 +0530 [thread overview]
Message-ID: <e5dcc2f0-df6d-46ed-b341-46de513c0728@quicinc.com> (raw)
In-Reply-To: <1e3a103d-d468-40c6-b03c-723427d7bb41@kernel.org>
Thanks Krzysztof !
On 2/9/2025 5:10 PM, Krzysztof Kozlowski wrote:
> On 07/02/2025 13:03, Mukesh Kumar Savaliya wrote:
>>>> + gi3c->se.clk = devm_clk_get(&pdev->dev, "se-clk");
>>>> + if (IS_ERR(gi3c->se.clk)) {
>>>> + ret = PTR_ERR(gi3c->se.clk);
>>>> + dev_err(&pdev->dev, "Error getting SE Core clk %d\n", ret);
>>>> + return ret;
>>>> + }
>>>> +
>>>> + ret = device_property_read_u32(&pdev->dev, "se-clock-frequency", &gi3c->clk_src_freq);
>>>
>>> You never tested your DTS or this code... Drop
>>>
>> I have tested on SM8550 MTP only. Below entry in my internal/local DTSI.
>
>
> And how is it supposed to work? Are you going to send us your local
> internal DTSI? Is it going to pass any checks?
was saying about code was testing with MTP. DTS was tested using
dt-bindings check.
I should add "se-clock-frequency" and "dfs-index"
>
>> Do you mean to say i should add this property in yaml too ?
>
> Yes.
>
> You cannot add undocumented ABI. That's a strong NAK.
>
sure , adding both properties into yaml.
>
>> se-clock-frequency = <100000000>;
>>>
>>>> + if (ret) {
>>>> + dev_info(&pdev->dev, "SE clk freq not specified, default to 100 MHz.\n");
>>>> + gi3c->clk_src_freq = 100000000;
>>>> + }
>>>> +
>>>> + ret = geni_icc_get(&gi3c->se, NULL);
>>>> + if (ret)
>>>> + return ret;
>>>> +
>>>> + /* Set the bus quota to a reasonable value for register access */
>>>> + gi3c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW;
>>>> + gi3c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW;
>>>> + ret = geni_icc_set_bw(&gi3c->se);
>>>> + if (ret) {
>>>> + dev_err(&pdev->dev, "%s: icc set bw failed ret:%d\n", __func__, ret);
>>>> + return ret;
>>>> + }
>>>> + dev_dbg(&pdev->dev, "%s: GENI_TO_CORE:%d CPU_TO_GENI:%d\n", __func__,
>>>> + gi3c->se.icc_paths[GENI_TO_CORE].avg_bw, gi3c->se.icc_paths[CPU_TO_GENI].avg_bw);
>>>> +
>>>> + ret = device_property_read_u32(&pdev->dev, "dfs-index", &gi3c->dfs_idx);
>>>
>>> The same. You cannot send us hidden ABI.
>>>
>>> This code does not look like ready for upstream. Are you sure it was
>>> internally reviewed?
>>>
>> yes, we have taken 2 rounds internally.
>
>
> And none of the reviewers spotted undocumented ABI? OK, learning
> experience for me.
>
>
>> Are you saying i should add this into yaml ? what do you mean by
>> hiddern ABI ?
>
>
> Where is the documentation of the ABI?
>
can you please point to other ABI document so i can prepare and share it.
>
>
> Best regards,
> Krzysztof
--
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c
next prev parent reply other threads:[~2025-02-10 16:12 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-05 14:31 [PATCH v1 0/3] Add Qualcomm i3c master controller driver support Mukesh Kumar Savaliya
2025-02-05 14:31 ` [PATCH v1 1/3] dt-bindings: i3c: Add Qualcomm I3C master controller bindings Mukesh Kumar Savaliya
2025-02-05 14:42 ` Krzysztof Kozlowski
2025-02-06 13:43 ` Mukesh Kumar Savaliya
2025-02-07 12:03 ` Mukesh Kumar Savaliya
2025-02-09 11:46 ` Krzysztof Kozlowski
2025-02-10 16:11 ` Mukesh Kumar Savaliya
2025-02-09 11:45 ` Krzysztof Kozlowski
2025-02-10 16:12 ` Mukesh Kumar Savaliya
2025-02-11 21:39 ` Rob Herring
2025-02-12 6:54 ` Krzysztof Kozlowski
2025-02-12 14:15 ` Mukesh Kumar Savaliya
2025-02-05 14:31 ` [PATCH v1 2/3] i3c: master: Add Qualcomm I3C master controller driver Mukesh Kumar Savaliya
2025-02-05 14:46 ` Krzysztof Kozlowski
2025-02-07 12:03 ` Mukesh Kumar Savaliya
2025-02-09 11:40 ` Krzysztof Kozlowski
2025-02-10 16:11 ` Mukesh Kumar Savaliya [this message]
2025-02-11 21:41 ` Rob Herring
2025-02-12 19:29 ` Mukesh Kumar Savaliya
2025-02-12 19:39 ` Krzysztof Kozlowski
2025-02-12 19:49 ` Mukesh Kumar Savaliya
2025-02-06 16:48 ` Frank Li
2025-02-07 12:16 ` Mukesh Kumar Savaliya
2025-02-05 14:31 ` [PATCH v1 3/3] MAINTAINERS: Add maintainer for Qualcomm's I3C driver Mukesh Kumar Savaliya
2025-02-05 16:23 ` [PATCH v1 0/3] Add Qualcomm i3c master controller driver support Wolfram Sang
2025-02-07 12:05 ` Mukesh Kumar Savaliya
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e5dcc2f0-df6d-46ed-b341-46de513c0728@quicinc.com \
--to=quic_msavaliy@quicinc.com \
--cc=alexandre.belloni@bootlin.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jarkko.nikula@linux.intel.com \
--cc=krzk+dt@kernel.org \
--cc=krzk@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-i3c@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox