Re: [PATCH v1 2/3] i3c: master: Add Qualcomm I3C master controller driver

From: Rob Herring <robh@kernel.org>
To: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	alexandre.belloni@bootlin.com, krzk+dt@kernel.org,
	conor+dt@kernel.org, jarkko.nikula@linux.intel.com,
	linux-i3c@lists.infradead.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 2/3] i3c: master: Add Qualcomm I3C master controller driver
Date: Tue, 11 Feb 2025 15:41:28 -0600	[thread overview]
Message-ID: <20250211214128.GB1215572-robh@kernel.org> (raw)
In-Reply-To: <e5dcc2f0-df6d-46ed-b341-46de513c0728@quicinc.com>

On Mon, Feb 10, 2025 at 09:41:28PM +0530, Mukesh Kumar Savaliya wrote:
> Thanks Krzysztof !
> 
> On 2/9/2025 5:10 PM, Krzysztof Kozlowski wrote:
> > On 07/02/2025 13:03, Mukesh Kumar Savaliya wrote:
> > > > > +	gi3c->se.clk = devm_clk_get(&pdev->dev, "se-clk");
> > > > > +	if (IS_ERR(gi3c->se.clk)) {
> > > > > +		ret = PTR_ERR(gi3c->se.clk);
> > > > > +		dev_err(&pdev->dev, "Error getting SE Core clk %d\n", ret);
> > > > > +		return ret;
> > > > > +	}
> > > > > +
> > > > > +	ret = device_property_read_u32(&pdev->dev, "se-clock-frequency", &gi3c->clk_src_freq);
> > > > 
> > > > You never tested your DTS or this code... Drop
> > > > 
> > > I have tested on SM8550 MTP only. Below entry in my internal/local DTSI.
> > 
> > 
> > And how is it supposed to work? Are you going to send us your local
> > internal DTSI? Is it going to pass any checks?
> was saying about code was testing with MTP. DTS was tested using dt-bindings
> check.

make dtbs_check is how you test.

> I should add "se-clock-frequency" and "dfs-index"

No. We already have standard clock properties and we don't put indexes 
into DT. 

Rob

-- 
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c