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From: Shaohua Li <shaohua.li@intel.com>
To: linux-ia64@vger.kernel.org
Subject: [PATCH]forbid ptrace changes psr.ri to 3
Date: Thu, 16 Aug 2007 06:16:39 +0000	[thread overview]
Message-ID: <1187244999.30462.6.camel@sli10-conroe.sh.intel.com> (raw)

PSR.ri bits 3 are reserved, change to 3 will break kernel.

The patch ignore such change, if you thought access_urea should return
an error in the case, please let me know.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>

--- a/arch/ia64/kernel/ptrace.c	2007-08-27 05:48:49.000000000 +0800
+++ b/arch/ia64/kernel/ptrace.c	2007-08-27 05:57:42.000000000 +0800
@@ -951,10 +951,14 @@ access_uarea (struct task_struct *child,
 			return 0;
 
 		      case PT_CR_IPSR:
-			if (write_access)
-				pt->cr_ipsr = ((*data & IPSR_MASK)
+			if (write_access) {
+				unsigned long tmp = *data;
+				/* psr.ri bits 11 are reserved, ingore the change */
+				if ((tmp & IA64_PSR_RI) = IA64_PSR_RI)
+					tmp &= ~IA64_PSR_RI;
+				pt->cr_ipsr = ((tmp & IPSR_MASK)
 					       | (pt->cr_ipsr & ~IPSR_MASK));
-			else
+			} else
 				*data = (pt->cr_ipsr & IPSR_MASK);
 			return 0;
 

             reply	other threads:[~2007-08-16  6:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-08-16  6:16 Shaohua Li [this message]
2007-08-17  6:01 ` [PATCH]forbid ptrace changes psr.ri to 3 Roland McGrath
2007-08-17 17:21 ` Luck, Tony
2007-08-17 18:40 ` Bjorn Helgaas
2007-08-17 18:44 ` Luck, Tony
2007-08-17 18:47 ` Bjorn Helgaas

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