From: Yasunori Goto <y-goto@jp.fujitsu.com>
To: Christoph Lameter <cl@linux-foundation.org>
Cc: "Luck, Tony" <tony.luck@intel.com>,
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>,
linux-ia64@vger.kernel.org,
Linux Kernel ML <linux-kernel@vger.kernel.org>,
Joerg Roedel <joerg.roedel@amd.com>
Subject: Re: [Q] Why does dma_alloc_coherent() of ia64 GFP_DMA?
Date: Tue, 11 Nov 2008 05:39:18 +0000 [thread overview]
Message-ID: <20081111141430.D5C7.E1E9C6FF@jp.fujitsu.com> (raw)
In-Reply-To: <Pine.LNX.4.64.0811101600490.32282@quilx.com>
> On Mon, 10 Nov 2008, Yasunori Goto wrote:
>
> > Even if a device allows over 4G access and the driver doesn't specify
> > GFP_DMA, dma_alloc_coherent() returns under 4G area.
>
> GFP_DMA can become 0 for configurations that have
> !CONFIG_ZONE_DMA. Then all of memory is available.
>
> The call is subarch specific. So f.e. Altix sn_dma_alloc_coherent does
> not set __GFP_DMA.
I heard that Altix has IOMMU and __GFP_DMA is not necessary.
> If you have an IA64 arch that only support 32bit I/O then __GFP_DMA in
> dma_alloc_coherent makes sense.
Agree.
But our box supports both of 32bit I/O and 64bit I/O without IOMMU.
Is it abnormal platform? New interface is necessary for our box like Altix?
Bye.
--
Yasunori Goto
next prev parent reply other threads:[~2008-11-11 5:39 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-11-10 4:47 [Q] Why does dma_alloc_coherent() of ia64 GFP_DMA? Yasunori Goto
2008-11-10 12:59 ` Andi Kleen
2008-11-10 19:07 ` Robin Holt
2008-11-10 21:57 ` Christoph Lameter
2008-11-11 5:14 ` Yasunori Goto
2008-11-11 5:48 ` FUJITA Tomonori
2008-11-10 22:06 ` Christoph Lameter
2008-11-11 5:39 ` Yasunori Goto [this message]
2008-11-11 20:34 ` Christoph Lameter
2008-11-11 5:53 ` FUJITA Tomonori
2008-11-11 20:32 ` Christoph Lameter
2008-11-12 1:40 ` FUJITA Tomonori
2008-11-11 5:41 ` FUJITA Tomonori
2008-11-11 6:21 ` Yasunori Goto
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