* Re: [PATCH] percpu: add optimized generic percpu accessors
[not found] ` <20090127.134747.153565246.davem@davemloft.net>
@ 2009-01-27 22:47 ` Rick Jones
2009-01-28 0:17 ` Luck, Tony
0 siblings, 1 reply; 4+ messages in thread
From: Rick Jones @ 2009-01-27 22:47 UTC (permalink / raw)
To: David Miller
Cc: cl, tj, rusty, mingo, herbert, akpm, hpa, brgerst, ebiederm,
travis, linux-kernel, steiner, hugh, netdev, mathieu.desnoyers,
linux-ia64@vger.kernel.org
David Miller wrote:
> From: Christoph Lameter <cl@linux-foundation.org>
> Date: Tue, 27 Jan 2009 15:08:57 -0500 (EST)
>
>
>>On Tue, 27 Jan 2009, Tejun Heo wrote:
>>
>>
>>>>later). That's because they use TLB tricks for a static 64k per-cpu
>>>>area, but this doesn't scale. That might not be vital: abandoning
>>>>that trick will mean they can't optimise read_percpu/read_percpu_var
>>>>etc as much.
>>
>>Why wont it scale? this is a separate TLB entry for each processor.
>
>
> The IA64 per-cpu TLB entry only covers 64k which makes use of it for
> dynamic per-cpu stuff out of the question. That's why it "doesn't
> scale"
I was asking around, and was told that on IA64 *harware* at least, in addition to
supporting multiple page sizes (up to a GB IIRC), one can pin up to 8 or perhaps
1/2 the TLB entries.
So, in theory if one were so inclined the special pinned per-CPU entry could
either be more than one 64K entry, or a single, rather larger entry.
As a sanity check, I've cc'd linux-ia64.
rick jones
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] percpu: add optimized generic percpu accessors
2009-01-27 22:47 ` [PATCH] percpu: add optimized generic percpu accessors Rick Jones
@ 2009-01-28 0:17 ` Luck, Tony
2009-01-28 16:48 ` Christoph Lameter
0 siblings, 1 reply; 4+ messages in thread
From: Luck, Tony @ 2009-01-28 0:17 UTC (permalink / raw)
To: Rick Jones, David Miller
Cc: cl@linux-foundation.org, tj@kernel.org, rusty@rustcorp.com.au,
mingo@elte.hu, herbert@gondor.apana.org.au,
akpm@linux-foundation.org, hpa@zytor.com, brgerst@gmail.com,
ebiederm@xmission.com, travis@sgi.com,
linux-kernel@vger.kernel.org, steiner@sgi.com, hugh@veritas.com,
netdev@vger.kernel.org, mathieu.desnoyers@polymtl.ca,
linux-ia64@vger.kernel.org
> I was asking around, and was told that on IA64 *harware* at least, in addition to
> supporting multiple page sizes (up to a GB IIRC), one can pin up to 8 or perhaps
> 1/2 the TLB entries.
The number of TLB entries that can be pinned is model specific (but the
minimum allowed is 8 each for code & data). Page sizes supported also
vary by model, recent models go up to 4GB.
BUT ... we stopped pinning this entry in the TLB when benchmarks showed
that it was better to just insert this as a regular TLB entry which might
can be dropped to map something else. So now there is code in the Alt-DTLB
miss handler (ivt.S) to insert the per-cpu mapping on an as needed basis.
> So, in theory if one were so inclined the special pinned per-CPU entry could
> either be more than one 64K entry, or a single, rather larger entry.
Managing a larger space could be done ... but at the expense of making
the Alt-DTLB miss handler do a memory lookup to find the physical address
of the per-cpu page needed (assuming that we allocate a bunch of random
physical pages for use as per-cpu space rather than a single contiguous
block of physical memory).
When do we know the total amount of per-cpu memory needed?
1) CONFIG time?
2) Boot time?
3) Arbitrary run time?
-Tony
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] percpu: add optimized generic percpu accessors
2009-01-28 0:17 ` Luck, Tony
@ 2009-01-28 16:48 ` Christoph Lameter
2009-01-28 17:15 ` Luck, Tony
0 siblings, 1 reply; 4+ messages in thread
From: Christoph Lameter @ 2009-01-28 16:48 UTC (permalink / raw)
To: Luck, Tony
Cc: Rick Jones, David Miller, tj@kernel.org, rusty@rustcorp.com.au,
mingo@elte.hu, herbert@gondor.apana.org.au,
akpm@linux-foundation.org, hpa@zytor.com, brgerst@gmail.com,
ebiederm@xmission.com, travis@sgi.com,
linux-kernel@vger.kernel.org, steiner@sgi.com, hugh@veritas.com,
netdev@vger.kernel.org, mathieu.desnoyers@polymtl.ca,
linux-ia64@vger.kernel.org
On Tue, 27 Jan 2009, Luck, Tony wrote:
> Managing a larger space could be done ... but at the expense of making
> the Alt-DTLB miss handler do a memory lookup to find the physical address
> of the per-cpu page needed (assuming that we allocate a bunch of random
> physical pages for use as per-cpu space rather than a single contiguous
> block of physical memory).
We cannot resize the area by using a single larger TLB entry?
> When do we know the total amount of per-cpu memory needed?
> 1) CONFIG time?
Would be easiest.
> 2) Boot time?
We could make the TLB entry size configurable with a kernel parameter
> 3) Arbitrary run time?
We could reserve a larger virtual space and switch TLB entries as needed?
We would need do get larger order pages to do this.
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] percpu: add optimized generic percpu accessors
2009-01-28 16:48 ` Christoph Lameter
@ 2009-01-28 17:15 ` Luck, Tony
0 siblings, 0 replies; 4+ messages in thread
From: Luck, Tony @ 2009-01-28 17:15 UTC (permalink / raw)
To: Christoph Lameter
Cc: Rick Jones, David Miller, tj@kernel.org, rusty@rustcorp.com.au,
mingo@elte.hu, herbert@gondor.apana.org.au,
akpm@linux-foundation.org, hpa@zytor.com, brgerst@gmail.com,
ebiederm@xmission.com, travis@sgi.com,
linux-kernel@vger.kernel.org, steiner@sgi.com, hugh@veritas.com,
netdev@vger.kernel.org, mathieu.desnoyers@polymtl.ca,
linux-ia64@vger.kernel.org
> > Managing a larger space could be done ... but at the expense of making
> > the Alt-DTLB miss handler do a memory lookup to find the physical address
> > of the per-cpu page needed (assuming that we allocate a bunch of random
> > physical pages for use as per-cpu space rather than a single contiguous
> > block of physical memory).
>
> We cannot resize the area by using a single larger TLB entry?
Yes we could ... the catch is that the supported TLB page sizes go
up by multiples of 4. So if 64K is not enough the next stop is
at 256K, then 1M, then 4M, and so on.
That's why I asked when we know what total amount of per-cpu memory
is needed. CONFIG time or boot time is good, because allocating higher
order pages is easy at boot time. Arbitrary run time is bad because
we might have difficulty allocating a high order page for every cpu.
-Tony
^ permalink raw reply [flat|nested] 4+ messages in thread
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2009-01-27 22:47 ` [PATCH] percpu: add optimized generic percpu accessors Rick Jones
2009-01-28 0:17 ` Luck, Tony
2009-01-28 16:48 ` Christoph Lameter
2009-01-28 17:15 ` Luck, Tony
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