[Linux-ia64] Multimedia Instructions

[Linux-ia64] Multimedia Instructions

[Mattox, Dave]

Couple questions for you all if you don't mind:

1. Is there a mailing list for information on just IA-64? A majority of my
issues deal with the architecture exclusively and I don't want to pollute
this mailing list. If anyone knows of one I would appreciate a link.

2. Does anyone know if the 10 clock cycle penalty for a multimedia
instruction result used in a different instruction type is just a quirk of
the Itanium Chip or will this most likely be carried into future IA-64
Chipsets? If this penalty is likely to disappear in future versions, I don't
mind coding it for a hit now.

The penalty I am talking about is a code segment such as:
mux1 r36 = r37, @rev;;   // mm instruction
add r38 = 5, r36		// 10 clock penalty for using result in a
different instruction type

It's interesting how the following is actually faster:
mux1 r36 = r37, @rev;;
nop;;
nop;;
nop;;
nop;;
add r38 = 5, r36

Thanks,
Dave Mattox

Re: [Linux-ia64] Multimedia Instructions

[Dan Pop]

On Fri, 20 Oct 2000, Mattox, Dave wrote:

> 2. Does anyone know if the 10 clock cycle penalty for a multimedia
> instruction result used in a different instruction type is just a quirk of
> the Itanium Chip or will this most likely be carried into future IA-64
> Chipsets? 

It's certainly an implementation detail of the Itanium, not a property
of the IA64 architecture.  Of course, only some Intel people have an
idea about what the penalty will be in the next implementation.

Dan

RE: [Linux-ia64] Multimedia Instructions

[Mattox, Dave]

I figured as much. Its just a shame that some really nice instructions have
such relatively huge penalties associated with them.

Dave

-----Original Message-----
From: linux-ia64-admin@linuxia64.org
[mailto:linux-ia64-admin@linuxia64.org]On Behalf Of Dan Pop
Sent: Friday, October 20, 2000 4:26 PM
To: Mattox, Dave
Cc: 'linux-ia64@linuxia64.org'
Subject: Re: [Linux-ia64] Multimedia Instructions




On Fri, 20 Oct 2000, Mattox, Dave wrote:

> 2. Does anyone know if the 10 clock cycle penalty for a multimedia
> instruction result used in a different instruction type is just a quirk of
> the Itanium Chip or will this most likely be carried into future IA-64
> Chipsets? 

It's certainly an implementation detail of the Itanium, not a property
of the IA64 architecture.  Of course, only some Intel people have an
idea about what the penalty will be in the next implementation.

Dan


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RE: [Linux-ia64] Multimedia Instructions

[Saxena, Sunil]

Hi Dave,

Here is the answer I got from the architecture team.

Thanks
Sunil

     > -----Original Message-----
     > From: Mattox, Dave [mailto:DMattox@UNITECH.COM]
     > Sent: Friday, October 20, 2000 3:16 PM
     > To: 'linux-ia64@linuxia64.org'
     > Subject: [Linux-ia64] Multimedia Instructions
     > 
     > 
     > Couple questions for you all if you don't mind:
     > 
     > 1. Is there a mailing list for information on just 
     > IA-64? A majority of my
     > issues deal with the architecture exclusively and I 
     > don't want to pollute
     > this mailing list. If anyone knows of one I would 
     > appreciate a link.
I dont' know about a mailing list, but Sathya should know if
there is anything official.

     > 2. Does anyone know if the 10 clock cycle penalty for a 
     > multimedia
     > instruction result used in a different instruction type 
     > is just a quirk of
     > the Itanium Chip or will this most likely be carried 
     > into future IA-64
     > Chipsets? If this penalty is likely to disappear in 
     > future versions, I don't
     > mind coding it for a hit now.
This penalty is likely to be Itanium specific and hopefully will
NOT be present on future products.  However, I would still consider
the stops as those 10 cycle penalties can *really* hurt if they
are in a warm to hot region of code.

     > 
     > The penalty I am talking about is a code segment such as:
     > mux1 r36 = r37, @rev;;   // mm instruction
     > add r38 = 5, r36		// 10 clock penalty for using 
     > result in a
     > different instruction type
     > 
     > It's interesting how the following is actually faster:
     > mux1 r36 = r37, @rev;;
     > nop;;
     > nop;;
     > nop;;
     > nop;;
     > add r38 = 5, r36
     > 
     > Thanks,
     > Dave Mattox
     > 
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     >