* [Linux-ia64] kernel test10 CMCV definition
@ 2000-11-20 11:07 Hirofumi Fujita
0 siblings, 0 replies; 2+ messages in thread
From: Hirofumi Fujita @ 2000-11-20 11:07 UTC (permalink / raw)
To: linux-ia64
Hi,
In test10 kernel, the definition of CMC vector register looks
different from Intel's documnet (The Itanium Architecture Software
Developer's Manual Vol. 2 rev. 1.1: System Architecture).
The order of bit fields are wrong ?
Hirofumi Fujita
Hitachi, Ltd.
--- linux-2.4.0-test10-ia64-001115/include/asm-ia64/mca.h.org Thu Nov 16 17:46:36 2000
+++ linux-2.4.0-test10-ia64-001115/include/asm-ia64/mca.h Mon Nov 20 17:23:24 2000
@@ -46,11 +46,11 @@
u64 cmcv_regval;
struct {
u64 cmcr_vector : 8;
- u64 cmcr_ignored1 : 47;
- u64 cmcr_mask : 1;
- u64 cmcr_reserved1 : 3;
- u64 cmcr_ignored2 : 1;
- u64 cmcr_reserved2 : 4;
+ u64 cmcr_reserved1 : 4;
+ u64 cmcr_ignored1 : 1;
+ u64 cmcr_reserved2 : 3;
+ u64 cmcr_mask : 1;
+ u64 cmcr_ignored2 : 47;
} cmcv_reg_s;
} cmcv_reg_t;
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [Linux-ia64] kernel test10 CMCV definition
@ 2000-12-05 21:35 David Mosberger
0 siblings, 0 replies; 2+ messages in thread
From: David Mosberger @ 2000-12-05 21:35 UTC (permalink / raw)
To: linux-ia64
You are right. How strange. I applied your patch to my tree.
Thanks,
--david
>>>>> On Mon, 20 Nov 2000 20:07:25 +0900, Hirofumi Fujita <h-fujita@ebina.hitachi.co.jp> said:
Hirofumi> Hi, In test10 kernel, the definition of CMC vector
Hirofumi> register looks different from Intel's documnet (The
Hirofumi> Itanium Architecture Software Developer's Manual Vol. 2
Hirofumi> rev. 1.1: System Architecture).
Hirofumi> The order of bit fields are wrong ?
Hirofumi> Hirofumi Fujita Hitachi, Ltd.
^ permalink raw reply [flat|nested] 2+ messages in thread
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