Re: [Linux-ia64] Re: Lockups on 2.4.1

[Francis Galiegue <fg@mandrakesoft.com>]

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On Sat, 24 Feb 2001, Joseph V Moss wrote:

> 
> You've got a small cut'n'paste error there:
>  

[...]
> > +  with a B1-step CPU.  You have a B0-step CPU if the "revision" field in
>                                      ^^

Oops! Corrected version attached. Thanks for noticing.

-- 
Francis Galiegue, fg@mandrakesoft.com - Normand et fier de l'être
"Programming is a race between programmers, who try and make more and more
idiot-proof software, and universe, which produces more and more remarkable
idiots. Until now, universe leads the race"  -- R. Cook

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diff -urN linux-old/Documentation/Configure.help linux/Documentation/Configure.help
--- linux-old/Documentation/Configure.help	Sat Feb 24 08:29:45 2001
+++ linux/Documentation/Configure.help	Sat Feb 24 09:24:15 2001
@@ -17119,17 +17119,36 @@
   with a B0-step CPU.  You have a B0-step CPU if the "revision" field in
   /proc/cpuinfo is 1.
 
+Enable Itanium B1-step specific code
+CONFIG_ITANIUM_B1_SPECIFIC
+  Select this option to bild a kernel for an Itanium prototype system
+  with a B1-step CPU.  You have a B1-step CPU if the "revision" field in
+  /proc/cpuinfo is 2.
+
+Enable Itanium B2-step specific code
+CONFIG_ITANIUM_B2_SPECIFIC
+  Select this option to bild a kernel for an Itanium prototype system
+  with a B2-step CPU.  You have a B2-step CPU if the "revision" field in
+  /proc/cpuinfo is 3.
+
 Force interrupt redirection
 CONFIG_IA64_HAVE_IRQREDIR
   Select this option if you know that your system has the ability to
   redirect interrupts to different CPUs.  Select N here if you're
   unsure.
 
-Enable use of global TLB purge instruction (ptc.g)
+Enable use of global TLB purge instruction (ptc.g) (READ HELP!)
 CONFIG_ITANIUM_PTCG
-  Say Y here if you want the kernel to use the IA-64 "ptc.g"
-  instruction to flush the TLB on all CPUs.  Select N here if
-  you're unsure.
+  Saying Y here will allow the kernel to use the IA-64 "ptc.g"
+  instruction to flush the TLB on all CPUs.
+  
+  Say N here if the kernel will run on early B step CPUs (B0, B1 and B2). You
+  have such a CPU (or CPUs) if the revision field(s) in /proc/cpuinfo range(s)
+  from 1 to 3. In this case, you should also say Y to "Disable VHPT" (this is
+  in "Kernel hacking" section).
+
+  If you have a more recent CPU, however, you will have to do the opposite: say
+  Y here but N to "Disable VHPT".
 
 Enable SoftSDV hacks
 CONFIG_IA64_SOFTSDV_HACKS
@@ -17168,6 +17187,16 @@
 
   To use this option, you have to check that the "/proc file system
   support" (CONFIG_PROC_FS) is enabled, too.
+
+Disable VHPT (READ HELP!)
+CONFIG_DISABLE_VHPT
+  Say Y here if the kernel will run on early B step CPUs (B0, B1 and B2). You
+  have such a CPU (or CPUs) if the revision field(s) in /proc/cpuinfo range(s)
+  from 1 to 3. In this case, you should also say N to "Enable use of global TLB
+  purge instruction" (CONFIG_ITANIUM_PTCG) in the "General Setup" section.
+
+  If your CPU(s) is/are more recent, however, you will preferably do the
+  opposite: say N here, but say Y to CONFIG_ITANIUM_PTCG.
 
 #
 # A couple of things I keep forgetting:
diff -urN linux-old/arch/ia64/config.in linux/arch/ia64/config.in
--- linux-old/arch/ia64/config.in	Sat Feb 24 08:29:45 2001
+++ linux/arch/ia64/config.in	Sat Feb 24 09:26:27 2001
@@ -58,7 +58,7 @@
 	if [ "$CONFIG_ITANIUM_CSTEP_SPECIFIC" = "y" ]; then
 	  bool '   Enable Itanium C0-step specific code' CONFIG_ITANIUM_C0_SPECIFIC
 	fi
-	bool '  Enable use of global TLB purge instruction (ptc.g)' CONFIG_ITANIUM_PTCG
+	bool '  Enable use of global TLB purge instruction (ptc.g) (READ HELP!)' CONFIG_ITANIUM_PTCG
 fi
 
 if [ "$CONFIG_IA64_DIG" = "y" ]; then
@@ -259,6 +259,6 @@
 bool 'Turn on irq debug checks (slow!)' CONFIG_IA64_DEBUG_IRQ
 bool 'Print possible IA64 hazards to console' CONFIG_IA64_PRINT_HAZARDS
 bool 'Enable new unwind support' CONFIG_IA64_NEW_UNWIND
-bool 'Disable VHPT' CONFIG_DISABLE_VHPT
+bool 'Disable VHPT (READ HELP!)' CONFIG_DISABLE_VHPT
 
 endmenu