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* [Linux-ia64] incorrect misalignment handling
@ 2001-08-12  6:58 Zach, Yoav
  2001-08-13 19:31 ` David Mosberger
  0 siblings, 1 reply; 2+ messages in thread
From: Zach, Yoav @ 2001-08-12  6:58 UTC (permalink / raw)
  To: linux-ia64

[-- Attachment #1: Type: text/plain, Size: 948 bytes --]

We encountered a problem with the handling of misaligned operations. When
handling a misaligned 'stfX' instruction, the kernel uses the function
emulate_store_float( ), which practically copies the source to destination
byte by byte. The length of the operation is determined according to the
instruction's fsz completer, using the float_fsz table:

static const unsigned char float_fsz[4]={
	16, /* extended precision (e) */
	8,  /* integer (8)            */
	4,  /* single precision (s)   */
	8   /* double precision (d)   */
}

The problem is that fsz==e means the operation length is 10 bytes, and not
16 bytes as in the implementation. Attached is a small test case that
demonstrates this problem.

My questions are:
*	Is there a rationale behind this implementation, or is it just a
mistake ?
*	If it is a mistake, was it corrected in kernel versions later than
2.4.3 ? 

 <<mis64.c>> 
TIA,
Yoav.

Yoav Zach
Mail:        yoav.zach@intel.com


[-- Attachment #2: mis64.c --]
[-- Type: application/octet-stream, Size: 421 bytes --]

#include <stdio.h>

char buff[20]
/* uncomment the next line to see how it is done in hw */
// __attribute__ ((aligned (16)))
;
int main()
{
    int i;

    for (i = 0; i< 10; i++)
        buff[i] = 'a';
    for (i = 10; i < 20; i++)
        buff[i] = 'A';
    __asm__ ("
        movl r2 = buff;;
        fmerge.s f10 = f0, f1;;
        stfe [r2] = f10;;
    ");
    printf("buff[10] = %c\n", buff[10]);
    return 0;
} 

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [Linux-ia64] incorrect misalignment handling
  2001-08-12  6:58 [Linux-ia64] incorrect misalignment handling Zach, Yoav
@ 2001-08-13 19:31 ` David Mosberger
  0 siblings, 0 replies; 2+ messages in thread
From: David Mosberger @ 2001-08-13 19:31 UTC (permalink / raw)
  To: linux-ia64

>>>>> On Sun, 12 Aug 2001 09:58:48 +0300, "Zach, Yoav" <yoav.zach@intel.com> said:

  Yoav> The problem is that fsz=e means the operation length is 10
  Yoav> bytes, and not 16 bytes as in the implementation. Attached is
  Yoav> a small test case that demonstrates this problem.

  Yoav> Is there a rationale behind this implementation, or is it just
  Yoav> a mistake ?

Looks like a bug to me.

  Yoav> * If it is a mistake, was it corrected in kernel versions
  Yoav> later than 2.4.3 ?

No, you're the first person to report this issue.  I'll look into
fixing this.  The bug also affects the "load" side (you could see a
page fault that otherwise you wouldn't see on a CPU that did the
unaligned access in hardware).

	--david


^ permalink raw reply	[flat|nested] 2+ messages in thread

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