From: Jack Steiner <steiner@sgi.com>
To: linux-ia64@vger.kernel.org
Subject: Re: Reliably creating MCA on white box Itanium-1
Date: Thu, 03 Jul 2003 13:27:36 +0000 [thread overview]
Message-ID: <marc-linux-ia64-105723890315422@msgid-missing> (raw)
In-Reply-To: <marc-linux-ia64-105721395828393@msgid-missing>
>
> Is there a way of reliably creating an MCA on a white box Itanium 1?
> B3 processors, firmware is B117A. Failing that, what about creating an
> MCA on a white box Itanium-2?
>
> Loading a duplicate ITC is no good, I need an MCA that actually enters
> ia64_mca_ucmc_handler in mca.c. A working example using
> PAL_CACHE_WRITE would be nice.
Why doesnt loading a duplicate TR (not TC) work for you? I've used that
method and found it to be reliable.
Another way that is reliable (at least on our hardware) is to do a
load from a non-existent region 6 or 7 address. The failure modes are
different between region 6 & 7, but they both reliably produce MCAs.
--
Thanks
Jack Steiner (651-683-5302) (vnet 233-5302) steiner@sgi.com
next prev parent reply other threads:[~2003-07-03 13:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-07-03 6:29 Reliably creating MCA on white box Itanium-1 Keith Owens
2003-07-03 13:27 ` Jack Steiner [this message]
2003-07-04 1:26 ` Keith Owens
2003-07-04 1:42 ` Jack Steiner
2003-07-04 12:56 ` Grant Grundler
2003-07-09 15:27 ` Luck, Tony
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