From: "Luck, Tony" <tony.luck@intel.com>
To: linux-ia64@vger.kernel.org
Subject: RE: Reliably creating MCA on white box Itanium-1
Date: Wed, 09 Jul 2003 15:27:21 +0000 [thread overview]
Message-ID: <marc-linux-ia64-105776474800987@msgid-missing> (raw)
In-Reply-To: <marc-linux-ia64-105721395828393@msgid-missing>
> Seems to me that a TLB error caused by a duplicate TR dropin
> *should* call
> C code. A MCA caused by a duplicate TR is a software bug that should
> panic the system.
>
> I understand that TLB parity errors would be silently
> corrected in mca_asm.S
> by reloading the TLB.
The patch that I posted recently (June 25th) for recovery
from TLB MCA errors (for 2.4 ... version for 2.5 will be
out soon). Should do what you want. The assembly code checks
the "processor state parameter" to see if there was a TLB
error, if there is, then it fixes it by purging the TLB and
reloading ITR[0,1], DTR[0,1,2]. It then calls the C-code
handler (in case there are other errors in the same MCA, and
to give the upper level code an opportunity to do whatever
logging it wants to do).
-Tony
prev parent reply other threads:[~2003-07-09 15:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-07-03 6:29 Reliably creating MCA on white box Itanium-1 Keith Owens
2003-07-03 13:27 ` Jack Steiner
2003-07-04 1:26 ` Keith Owens
2003-07-04 1:42 ` Jack Steiner
2003-07-04 12:56 ` Grant Grundler
2003-07-09 15:27 ` Luck, Tony [this message]
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