Re: sata_sil problem / oops

[Jens Axboe <axboe@suse.de>]

On Thu, Jun 02 2005, Jens Axboe wrote:
> On Thu, Jun 02 2005, Daniela Engert wrote:
> > On Thu, 2 Jun 2005 12:03:58 +0200, Marcus Meissner wrote:
> > 
> > >We see a problem in the sata_sil driver. The code looks like this:
> > >
> > >	 cls=sil_get_device_cache_line(pdev);
> > >	 cls >>= 3;
> > >	 cls++;  /* cls = (line_size/8)+1 */
> > >	 writeb(cls, mmio_base + SIL_FIFO_R0);
> > >	 writeb(cls, mmio_base + SIL_FIFO_W0);
> > >	 writeb(cls, mmio_base + SIL_FIFO_R1);
> > >	 writeb(cls, mmio_base + SIL_FIFO_W2);
> > >
> > >We have a device where mmio_base is only 0x200 byte long, so
> > >the access to SIL_FIFO_W2 (offset 0x241) causes an Oops.
> > >
> > >- Should it perhaps be W1 instead of W2?
> > >- If not, does it need a range check?
> > 
> > My OS/2 driver and the Windows driver write to the following locations:
> > 
> > SiI3112: BAR5+0x40, BAR5+0x41, BAR5+0x44, BAR5+0x45
> > SiI3114: BAR5+0x40, BAR5+0x41, BAR5+0x44, BAR5+0x45,
> > 	 BAR5+0x240, BAR5+0x241, BAR5+0x244, BAR5+0x245
> 
> Does the 3112 have two ports and the 3114 four?

Seems that is so, from looking at the driver. If I were to guess at a
fix for this, it would be as follows.

diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -432,7 +432,13 @@ static int sil_init_one (struct pci_dev 
 		writeb(cls, mmio_base + SIL_FIFO_R0);
 		writeb(cls, mmio_base + SIL_FIFO_W0);
 		writeb(cls, mmio_base + SIL_FIFO_R1);
-		writeb(cls, mmio_base + SIL_FIFO_W2);
+		writeb(cls, mmio_base + SIL_FIFO_W1);
+		if (ent->driver_data == sil_3114) {
+			writeb(cls, mmio_base + SIL_FIFO_R2);
+			writeb(cls, mmio_base + SIL_FIFO_W2);
+			writeb(cls, mmio_base + SIL_FIFO_R3);
+			writeb(cls, mmio_base + SIL_FIFO_W3);
+		}
 	} else
 		printk(KERN_WARNING DRV_NAME "(%s): cache line size not set.  Driver may not function\n",
 			pci_name(pdev));

-- 
Jens Axboe