Re: ahci.c

Re: ahci.c

[Jeff Garzik]

dunneil wrote:
> hi,
>  
>   My hardware is AHCI SATA controller with FPGA-based PCIE board.My 
> kernel is 2.6.20.7. after insmod ahci.ko, i run lspci -xxxxvvvv 
> command.but,it seems that it doesn't set the BUS master enable bit of 
> PCIE header command register.plz check my header content.
>  
>   But,i run Pcitree software at windows.The BUS master enable is 
> observed to be set,and that i can read out a part of sata register value.
>  
>   how to debug this issue?

ahci.c calls pci_set_master() to enable the BusMaster bit.

	Jeff

Re: ahci.c

[dunneil]

Maybe,Didn't the driver reach the function pci_set_master() because of other 
initial or error?

I try to load other myself driver(for ethernet,it also call 
pci_set_master() ),and the Bus Master Enable can be set!

Can i comment out some unnecessary initial or step?

--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Thursday, June 12, 2008 10:50 AM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> hi,
>>
>>   My hardware is AHCI SATA controller with FPGA-based PCIE board.My
>> kernel is 2.6.20.7. after insmod ahci.ko, i run lspci -xxxxvvvv
>> command.but,it seems that it doesn't set the BUS master enable bit of
>> PCIE header command register.plz check my header content.
>>
>>   But,i run Pcitree software at windows.The BUS master enable is
>> observed to be set,and that i can read out a part of sata register value.
>>
>>   how to debug this issue?
>
> ahci.c calls pci_set_master() to enable the BusMaster bit.
>
> Jeff
>
>
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[dunneil]

My asata controller is based-PCIEx1 1-port SATA controller.



--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Thursday, June 12, 2008 10:50 AM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> hi,
>>
>>   My hardware is AHCI SATA controller with FPGA-based PCIE board.My
>> kernel is 2.6.20.7. after insmod ahci.ko, i run lspci -xxxxvvvv
>> command.but,it seems that it doesn't set the BUS master enable bit of
>> PCIE header command register.plz check my header content.
>>
>>   But,i run Pcitree software at windows.The BUS master enable is
>> observed to be set,and that i can read out a part of sata register value.
>>
>>   how to debug this issue?
>
> ahci.c calls pci_set_master() to enable the BusMaster bit.
>
> Jeff
>
>
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[dunneil]

if there are two ASATA controller inside motherboard, it will cause conflict 
for BUS Master Enable bit?

--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Thursday, June 12, 2008 10:50 AM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> hi,
>>
>>   My hardware is AHCI SATA controller with FPGA-based PCIE board.My
>> kernel is 2.6.20.7. after insmod ahci.ko, i run lspci -xxxxvvvv
>> command.but,it seems that it doesn't set the BUS master enable bit of
>> PCIE header command register.plz check my header content.
>>
>>   But,i run Pcitree software at windows.The BUS master enable is
>> observed to be set,and that i can read out a part of sata register value.
>>
>>   how to debug this issue?
>
> ahci.c calls pci_set_master() to enable the BusMaster bit.
>
> Jeff
>
>
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[dunneil]

if there are two ASATA controller inside motherboard, it will cause conflict
for BUS Master Enable bit? Do i need disable the motherboard integrated 
ASATA controoller for my separate ASATA controller FPGA board?


--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Thursday, June 12, 2008 10:50 AM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> hi,
>>
>>   My hardware is AHCI SATA controller with FPGA-based PCIE board.My
>> kernel is 2.6.20.7. after insmod ahci.ko, i run lspci -xxxxvvvv
>> command.but,it seems that it doesn't set the BUS master enable bit of
>> PCIE header command register.plz check my header content.
>>
>>   But,i run Pcitree software at windows.The BUS master enable is
>> observed to be set,and that i can read out a part of sata register value.
>>
>>   how to debug this issue?
>
> ahci.c calls pci_set_master() to enable the BusMaster bit.
>
> Jeff
>
>
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[Jeff Garzik]

dunneil wrote:
> if there are two ASATA controller inside motherboard, it will cause 
> conflict
> for BUS Master Enable bit? Do i need disable the motherboard integrated 
> ASATA controoller for my separate ASATA controller FPGA board?

You can have as many AHCI PCI devices as you wish.

Each PCI device has its own Bus Master Enable bit in the PCI Command
register.

	Jeff

Re: ahci.c

[dunneil]

thx your response~

my test step is as following.


My asata controller is based-PCIEx1 1-port SATA controller.The ASATA FPGA 
board is plugged into PC motherboard. My os is AS5.1.the kernel is 2.6.20.7.

1>
Before insmod ahci.ko manualy, the {IO,Mem,BusMaster}=3'b111.

After insmod ahci.ko manualy,the {IO,Mem,BusMaster}=3'b110.

The Bus Master Enable is not be set.

2> I load my available ethernet NIC driver. My NIC and SATA Controller 
hardware architecture is similar,especially pci part.

The BusMasterEnable can be set by the ethernet NIC driver.

how to debug?


thanks a lot

--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Friday, June 13, 2008 4:49 PM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> if there are two ASATA controller inside motherboard, it will cause
>> conflict
>> for BUS Master Enable bit? Do i need disable the motherboard integrated
>> ASATA controoller for my separate ASATA controller FPGA board?
>
> You can have as many AHCI PCI devices as you wish.
>
> Each PCI device has its own Bus Master Enable bit in the PCI Command
> register.
>
> Jeff
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[Jeff Garzik]

dunneil wrote:
> thx your response~
> 
> my test step is as following.
> 
> 
> My asata controller is based-PCIEx1 1-port SATA controller.The ASATA 
> FPGA board is plugged into PC motherboard. My os is AS5.1.the kernel is 
> 2.6.20.7.
> 
> 1>
> Before insmod ahci.ko manualy, the {IO,Mem,BusMaster}=3'b111.
> 
> After insmod ahci.ko manualy,the {IO,Mem,BusMaster}=3'b110.
> 
> The Bus Master Enable is not be set.
> 
> 2> I load my available ethernet NIC driver. My NIC and SATA Controller 
> hardware architecture is similar,especially pci part.
> 
> The BusMasterEnable can be set by the ethernet NIC driver.
> 
> how to debug?

At this point you need to buy some books on PCI and such and master the
basics.

We are not here to teach you everything in the world about PCI or AHCI,
nor are we here to debug your FPGA hardware setup.

If you are going to be working at a low level, you are expected to know
this stuff already.

	Jeff

Re: ahci.c

[dunneil]

dmesg report:

ahci 0000:03:00.0 version 2.0
ACPI:PCI Interrupt 0000:03:00.0[A] -> GSI 16 (level,low) -> IRQ 16
ACPI:PCI Interrupt for device 0000:03:00.0 disabled
ahci:probe of 0000:03:00.0 failed with error -12

--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Friday, June 13, 2008 4:49 PM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> if there are two ASATA controller inside motherboard, it will cause 
>> conflict
>> for BUS Master Enable bit? Do i need disable the motherboard integrated 
>> ASATA controoller for my separate ASATA controller FPGA board?
> 
> You can have as many AHCI PCI devices as you wish.
> 
> Each PCI device has its own Bus Master Enable bit in the PCI Command
> register.
> 
> Jeff
> 
> 
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[dunneil]

Mine is MSI interrupt.

--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Friday, June 13, 2008 4:49 PM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> if there are two ASATA controller inside motherboard, it will cause 
>> conflict
>> for BUS Master Enable bit? Do i need disable the motherboard integrated 
>> ASATA controoller for my separate ASATA controller FPGA board?
> 
> You can have as many AHCI PCI devices as you wish.
> 
> Each PCI device has its own Bus Master Enable bit in the PCI Command
> register.
> 
> Jeff
> 
> 
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[dunneil]

it seems that the memory allocate is failed.

	probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);

why?

--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Friday, June 13, 2008 5:42 PM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> thx your response~
>> 
>> my test step is as following.
>> 
>> 
>> My asata controller is based-PCIEx1 1-port SATA controller.The ASATA 
>> FPGA board is plugged into PC motherboard. My os is AS5.1.the kernel is 
>> 2.6.20.7.
>> 
>> 1>
>> Before insmod ahci.ko manualy, the {IO,Mem,BusMaster}=3'b111.
>> 
>> After insmod ahci.ko manualy,the {IO,Mem,BusMaster}=3'b110.
>> 
>> The Bus Master Enable is not be set.
>> 
>> 2> I load my available ethernet NIC driver. My NIC and SATA Controller 
>> hardware architecture is similar,especially pci part.
>> 
>> The BusMasterEnable can be set by the ethernet NIC driver.
>> 
>> how to debug?
> 
> At this point you need to buy some books on PCI and such and master the
> basics.
> 
> We are not here to teach you everything in the world about PCI or AHCI,
> nor are we here to debug your FPGA hardware setup.
> 
> If you are going to be working at a low level, you are expected to know
> this stuff already.
> 
> Jeff
> 
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: ahci.c

[dunneil]

The ASATA Controller BAR0~BAR4 must be alloccated IO bar,BAR5 must be 
allocated Memory BAR?

The Bar0~4 IO Bar is option or necessary?

--------------------------------------------------
From: "Jeff Garzik" <jgarzik@pobox.com>
Sent: Friday, June 13, 2008 4:49 PM
To: "dunneil" <dunneil@live.cn>
Cc: <linux-ide@vger.kernel.org>
Subject: Re: ahci.c

> dunneil wrote:
>> if there are two ASATA controller inside motherboard, it will cause
>> conflict
>> for BUS Master Enable bit? Do i need disable the motherboard integrated
>> ASATA controoller for my separate ASATA controller FPGA board?
>
> You can have as many AHCI PCI devices as you wish.
>
> Each PCI device has its own Bus Master Enable bit in the PCI Command
> register.
>
> Jeff
>
>
>
>