[patch] Enable parallel scan on ata_piix

[patch] Enable parallel scan on ata_piix

[Arjan van de Ven]

Hi,

This patch turns on parallel scanning for the ata_piix driver.
This driver is used on most netbooks (no AHCI for cheap storage it seems).
The scan is the dominating time factor in the kernel boot for these
devices; with this flag it gets cut in half for the device I used
for testing (eeepc).
Alan took a look at the driver source and concluded that it ought to be safe
to do for this driver.

Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>

diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index ef8b30d..993f7af 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1563,6 +1563,7 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
 		host->ports[1]->mwdma_mask = 0;
 		host->ports[1]->udma_mask = 0;
 	}
+	host->flags |= ATA_HOST_PARALLEL_SCAN;
 
 	pci_set_master(pdev);
 	return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht);


-- 
Arjan van de Ven 	Intel Open Source Technology Centre
For development, discussion and tips for power savings, 
visit http://www.lesswatts.org

Re: [patch] Enable parallel scan on ata_piix

[Jeff Garzik]

Arjan van de Ven wrote:
> Hi,
> 
> This patch turns on parallel scanning for the ata_piix driver.
> This driver is used on most netbooks (no AHCI for cheap storage it seems).
> The scan is the dominating time factor in the kernel boot for these
> devices; with this flag it gets cut in half for the device I used
> for testing (eeepc).
> Alan took a look at the driver source and concluded that it ought to be safe
> to do for this driver.
> 
> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>

I tend to doubt "safe", given the complicated and buggy silicon state 
machine that recreates the legacy IDE interface on SATA...

	Jeff

Re: [patch] Enable parallel scan on ata_piix

[Alan Cox]

> > Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
> 
> I tend to doubt "safe", given the complicated and buggy silicon state 
> machine that recreates the legacy IDE interface on SATA...

The two channels on the ICH and PIIX are independant. There are other
controllers that have all sorts of nasty dependancies and shared state,
and there is also a bug/known limitation in the case of simplex hardware
- we don't honour the can queue checks during probing.

Alan

Re: [patch] Enable parallel scan on ata_piix

[Jeff Garzik]

Alan Cox wrote:
>>> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
>> I tend to doubt "safe", given the complicated and buggy silicon state 
>> machine that recreates the legacy IDE interface on SATA...
> 
> The two channels on the ICH and PIIX are independant. There are other

Starting with ICH5, not true.  Think PATA/SATA combined mode...

	Jeff

Re: [patch] Enable parallel scan on ata_piix

[Alan Cox]

On Fri, 24 Apr 2009 07:33:46 -0400
Jeff Garzik <jeff@garzik.org> wrote:

> Alan Cox wrote:
> >>> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
> >> I tend to doubt "safe", given the complicated and buggy silicon state 
> >> machine that recreates the legacy IDE interface on SATA...
> > 
> > The two channels on the ICH and PIIX are independant. There are other
> 
> Starting with ICH5, not true.  Think PATA/SATA combined mode...

The register sets as presented to us are independent, and there are no
interactions on our side. Wecould be extra paranoid about this but
testing says it works, code inspection says it works and there is nothing
in the chip docs or errata saying don't do it.

So at this point I don't think assuming the worst case is actually useful
because its only by trying this that we are going to find out if there
are any corner cases.

Alan