AHCI performance and IRQ load

[Joachim Foerster <joachim.foerster@missinglinkelectronics.com>]

Hi all,

we are currently working on a high performance storage test solution 
using SATA/AHCI. Due to having performance issues with small block sizes 
(high interrupt load), we did some research and came across a FAST12 
paper by Intel: "When Poll is Better than Interrupt".
The authors do suggest a synchronous completion model or even a hybrid 
mode with support for async and sync completion - for future SSDs.

Does anybody know, if there already is work going on to incorporate such 
functionality into the block layer & backends (meaning, among others: 
libata/ahci)?

Another thing, which seemed promising was AHCI's 
CommandCompletionCoalescing (CCC) feature. However most AHCI controllers 
don't seem to support this feature.
Anybody aware of AHCI controllers having CCC support?

There seemed to be a discussion about CCC support for the ahci driver 
some years ago http://www.spinics.net/lists/linux-ide/msg02994.html, but 
obviously no code came out of it - or is there a known patchset?

Thanks,
-- 
Joachim Förster
Direct DE: +49 (731) 141-149-42

Missing Link Electronics
http://www.missinglinkelectronics.com
Office DE: +49 (731) 141-149-0
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