From: Jonathan Cameron <jic23@kernel.org>
To: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Cc: "David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/7] iio: adc: add RZ/T2H / RZ/N2H ADC driver
Date: Sat, 27 Sep 2025 19:16:20 +0100 [thread overview]
Message-ID: <20250927191620.2babbe79@jic23-huawei> (raw)
In-Reply-To: <20250925224013.2146983-4-cosmin-gabriel.tanislav.xa@renesas.com>
On Fri, 26 Sep 2025 01:40:05 +0300
Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> wrote:
> Add support for the A/D 12-Bit successive approximation converters found
> in the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs.
>
> RZ/T2H has two ADCs with 4 channels and one with 6.
> RZ/N2H has two ADCs with 4 channels and one with 15.
>
> Conversions can be performed in single or continuous mode. Result of the
> conversion is stored in a 16-bit data register corresponding to each
> channel.
>
> The conversions can be started by a software trigger, a synchronous
> trigger (from MTU or from ELC) or an asynchronous external trigger (from
> ADTRGn# pin).
>
> Only single mode with software trigger is supported for now.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Hi Cosmin
A few minor comments inline. Nice little driver.
Jonathan
> diff --git a/drivers/iio/adc/rzt2h_adc.c b/drivers/iio/adc/rzt2h_adc.c
> new file mode 100644
> index 000000000000..6a49788a5c67
> --- /dev/null
> +++ b/drivers/iio/adc/rzt2h_adc.c
> @@ -0,0 +1,306 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include <linux/bitfield.h>
> +#include <linux/cleanup.h>
> +#include <linux/completion.h>
> +#include <linux/delay.h>
> +#include <linux/iio/adc-helpers.h>
> +#include <linux/iio/iio.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/property.h>
> +
> +#define RZT2H_NAME "rzt2h-adc"
> +
> +static void rzt2h_adc_start_stop(struct rzt2h_adc *adc, bool start,
> + unsigned int conversion_type)
> +{
> + u16 mask;
> + u16 reg;
Might as well use one line for those.
> +
> + reg = readw(adc->base + RZT2H_ADCSR_REG);
> +
> + if (start) {
To me having a shared function for start and stop isn't adding much here. I'd
just spit it and avoid the conditionals and passing a conversion type into stop
which makes no sense.
> + /* Set conversion type */
> + reg &= ~RZT2H_ADCSR_ADCS_MASK;
> + reg |= FIELD_PREP(RZT2H_ADCSR_ADCS_MASK, conversion_type);
FIELD_MODIFY()
> + }
> +
> + /* Toggle end of conversion interrupt and start bit. */
> + mask = RZT2H_ADCSR_ADIE_MASK | RZT2H_ADCSR_ADST_MASK;
> + if (start)
> + reg |= mask;
> + else
> + reg &= ~mask;
> +
> + writew(reg, adc->base + RZT2H_ADCSR_REG);
> +}
> +
> +static int rzt2h_adc_read_single(struct rzt2h_adc *adc, unsigned int ch, int *val)
> +{
> + int ret;
> +
> + ret = pm_runtime_resume_and_get(adc->dev);
> + if (ret)
> + return ret;
> +
> + guard(mutex)(&adc->lock);
See other branch of thread and guidance in cleanup.h wrt to gotos.
> +
> + reinit_completion(&adc->completion);
> +
> + /* Enable a single channel */
> + writew(RZT2H_ADANSA0_CH_MASK(ch), adc->base + RZT2H_ADANSA0_REG);
> +
> + rzt2h_adc_start_stop(adc, true, RZT2H_ADCSR_ADCS_SINGLE);
> +
> + /*
> + * Datasheet Page 2770, Table 41.1:
> + * 0.32us per channel when sample-and-hold circuits are not in use.
> + */
> + ret = wait_for_completion_timeout(&adc->completion, usecs_to_jiffies(1));
> + if (!ret) {
> + ret = -ETIMEDOUT;
> + goto disable;
> + }
> +
> + *val = readw(adc->base + RZT2H_ADDR_REG(ch));
> + ret = IIO_VAL_INT;
> +
> +disable:
> + rzt2h_adc_start_stop(adc, false, 0);
> +
> + pm_runtime_put_autosuspend(adc->dev);
> +
> + return ret;
> +}
> +static int rzt2h_adc_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct iio_dev *indio_dev;
> + struct rzt2h_adc *adc;
> + int ret;
> + int irq;
Might as well save a line.
int ret, irq;
> +
> + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
>
next prev parent reply other threads:[~2025-09-27 18:16 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 22:40 [PATCH v2 0/7] Add ADCs support for RZ/T2H and RZ/N2H Cosmin Tanislav
2025-09-25 22:40 ` [PATCH v2 1/7] clk: renesas: r9a09g077: Add ADC modules clock Cosmin Tanislav
2025-09-25 22:40 ` [PATCH v2 2/7] dt-bindings: iio: adc: document RZ/T2H and RZ/N2H ADC Cosmin Tanislav
2025-09-29 11:27 ` Geert Uytterhoeven
2025-09-25 22:40 ` [PATCH v2 3/7] iio: adc: add RZ/T2H / RZ/N2H ADC driver Cosmin Tanislav
2025-09-26 12:10 ` Nuno Sá
2025-09-26 12:41 ` Cosmin-Gabriel Tanislav
2025-09-26 14:41 ` Nuno Sá
2025-09-27 18:06 ` Jonathan Cameron
2025-09-27 18:16 ` Jonathan Cameron [this message]
2025-09-25 22:40 ` [PATCH v2 4/7] arm64: dts: renesas: r9a09g077: Add ADCs support Cosmin Tanislav
2025-09-25 22:40 ` [PATCH v2 5/7] arm64: dts: renesas: r9a09g087: " Cosmin Tanislav
2025-09-25 22:40 ` [PATCH v2 6/7] arm64: dts: renesas: rzt2h/rzn2h-evk: enable ADCs Cosmin Tanislav
2025-09-25 22:40 ` [PATCH v2 7/7] arm64: defconfig: enable RZ/T2H / RZ/N2H ADC driver Cosmin Tanislav
2025-09-26 16:11 ` [PATCH v2 0/7] Add ADCs support for RZ/T2H and RZ/N2H Rob Herring (Arm)
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