From: Antoniu Miclaus <antoniu.miclaus@analog.com>
To: <jic23@kernel.org>, <robh@kernel.org>, <conor+dt@kernel.org>,
<linux-iio@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>
Cc: Antoniu Miclaus <antoniu.miclaus@analog.com>
Subject: [PATCH v2 6/6] iio: adc: ad4080: add support for AD4081
Date: Tue, 30 Sep 2025 10:32:29 +0000 [thread overview]
Message-ID: <20250930103229.28696-6-antoniu.miclaus@analog.com> (raw)
In-Reply-To: <20250930103229.28696-1-antoniu.miclaus@analog.com>
Add support for AD4081 20-bit SAR ADC. The AD4081 has the same
resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
maximum (2 vs 7).
Changes:
- Add AD4081_CHIP_ID definition (0x0051)
- Create ad4081_channel with 20-bit resolution and 32-bit storage
- Add ad4081_chip_info with lvds_cnv_clk_cnt_max = 2
- Register AD4081 in device ID and OF match tables
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
no changes in v2.
drivers/iio/adc/ad4080.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index a68d7fa9f977..0dcbf175523c 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -126,6 +126,7 @@
/* Miscellaneous Definitions */
#define AD4080_SPI_READ BIT(7)
#define AD4080_CHIP_ID 0x0050
+#define AD4081_CHIP_ID 0x0051
#define AD4084_CHIP_ID 0x0054
#define AD4080_LVDS_CNV_CLK_CNT_MAX 7
@@ -436,6 +437,8 @@ static struct iio_chan_spec_ext_info ad4080_ext_info[] = {
static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20, 32);
+static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
+
static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
static const struct ad4080_chip_info ad4080_chip_info = {
@@ -448,6 +451,16 @@ static const struct ad4080_chip_info ad4080_chip_info = {
.lvds_cnv_clk_cnt_max = AD4080_LVDS_CNV_CLK_CNT_MAX,
};
+static const struct ad4080_chip_info ad4081_chip_info = {
+ .name = "ad4081",
+ .product_id = AD4081_CHIP_ID,
+ .scale_table = ad4080_scale_table,
+ .num_scales = ARRAY_SIZE(ad4080_scale_table),
+ .num_channels = 1,
+ .channels = &ad4081_channel,
+ .lvds_cnv_clk_cnt_max = 2,
+};
+
static const struct ad4080_chip_info ad4084_chip_info = {
.name = "ad4084",
.product_id = AD4084_CHIP_ID,
@@ -611,6 +624,7 @@ static int ad4080_probe(struct spi_device *spi)
static const struct spi_device_id ad4080_id[] = {
{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
+ { "ad4081", (kernel_ulong_t)&ad4081_chip_info },
{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
{ }
};
@@ -618,6 +632,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
static const struct of_device_id ad4080_of_match[] = {
{ .compatible = "adi,ad4080", &ad4080_chip_info },
+ { .compatible = "adi,ad4081", &ad4081_chip_info },
{ .compatible = "adi,ad4084", &ad4084_chip_info },
{ }
};
--
2.43.0
next prev parent reply other threads:[~2025-09-30 10:33 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-30 10:32 [PATCH v2 1/6] iio: adc: ad4080: fix chip identification Antoniu Miclaus
2025-09-30 10:32 ` [PATCH v2 2/6] iio: adc: ad4080: prepare driver for multi-part support Antoniu Miclaus
2025-09-30 12:36 ` Nuno Sá
2025-09-30 10:32 ` [PATCH v2 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4084 Antoniu Miclaus
2025-09-30 18:53 ` Conor Dooley
2025-09-30 10:32 ` [PATCH v2 4/6] iio: adc: ad4080: " Antoniu Miclaus
2025-09-30 12:37 ` Nuno Sá
2025-09-30 10:32 ` [PATCH v2 5/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4081 Antoniu Miclaus
2025-09-30 18:53 ` Conor Dooley
2025-09-30 10:32 ` Antoniu Miclaus [this message]
2025-09-30 12:38 ` [PATCH v2 6/6] iio: adc: ad4080: " Nuno Sá
2025-09-30 12:35 ` [PATCH v2 1/6] iio: adc: ad4080: fix chip identification Nuno Sá
2025-10-04 14:22 ` Jonathan Cameron
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