[PATCH 0/6] iio: adc: ad4080: add support for AD4083, AD4086, and AD4087

[PATCH 0/6] iio: adc: ad4080: add support for AD4083, AD4086, and AD4087

[Antoniu Miclaus]

This patch series extends the AD4080 driver to support three additional
variants in the AD408x family of high-speed SAR ADCs: AD4083, AD4086,
and AD4087.

Each variant has different specifications that require separate driver
configurations:

- AD4083: 16-bit resolution, LVDS CNV clock count max = 5
- AD4086: 14-bit resolution, LVDS CNV clock count max = 4
- AD4087: 14-bit resolution, LVDS CNV clock count max = 1

The series follows a consistent pattern for each new device:
1. Add device tree binding support with appropriate compatible string
2. Implement driver support with chip-specific configuration

All new devices reuse the existing driver infrastructure established for
the AD4080/AD4081/AD4084 family, requiring only chip-specific channel
definitions and chip info structures.

The devices cannot use fallback compatible strings to the base AD4080
as they have significantly different resolutions and timing requirements
that necessitate distinct driver configurations.

Antoniu Miclaus (6):
  dt-bindings: iio: adc: adi,ad4080: add support for AD4083
  iio: adc: ad4080: add support for AD4083
  dt-bindings: iio: adc: adi,ad4080: add support for AD4086
  iio: adc: ad4080: add support for AD4086
  dt-bindings: iio: adc: adi,ad4080: add support for AD4087
  iio: adc: ad4080: add support for AD4087

 .../bindings/iio/adc/adi,ad4080.yaml          |  3 ++
 drivers/iio/adc/ad4080.c                      | 45 +++++++++++++++++++
 2 files changed, 48 insertions(+)

-- 
2.43.0

[PATCH 1/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4083

[Antoniu Miclaus]

Add device tree binding support for the AD4083 16-bit SAR ADC.
Add adi,ad4083 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4083 has different resolution (16-bit vs 20-bit) and LVDS CNV clock
count maximum (5 vs 7), requiring different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index a9fa068189ea..9d2b4b8edf42 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -27,6 +27,7 @@ properties:
     enum:
       - adi,ad4080
       - adi,ad4081
+      - adi,ad4083
       - adi,ad4084
 
   reg:
-- 
2.43.0

[PATCH 2/6] iio: adc: ad4080: add support for AD4083

[Antoniu Miclaus]

Add support for AD4083 16-bit SAR ADC. The AD4083 differs from
AD4080 in resolution (16-bit vs 20-bit) and LVDS CNV clock count
maximum (5 vs 7).

Changes:
- Add AD4083_CHIP_ID definition (0x0053)
- Create ad4083_channel with 16-bit resolution and storage
- Add ad4083_chip_info with lvds_cnv_clk_cnt_max = 5
- Register AD4083 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 5940651655df..e2cdca2e9174 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -127,6 +127,7 @@
 #define AD4080_SPI_READ						BIT(7)
 #define AD4080_CHIP_ID						0x0050
 #define AD4081_CHIP_ID						0x0051
+#define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
 
 #define AD4080_LVDS_CNV_CLK_CNT_MAX				7
@@ -439,6 +440,8 @@ static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20, 32)
 
 static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
 
+static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16);
+
 static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
 
 static const struct ad4080_chip_info ad4080_chip_info = {
@@ -461,6 +464,16 @@ static const struct ad4080_chip_info ad4081_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4083_chip_info = {
+	.name = "ad4083",
+	.product_id = AD4083_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4083_channel,
+	.lvds_cnv_clk_cnt_max = 5,
+};
+
 static const struct ad4080_chip_info ad4084_chip_info = {
 	.name = "ad4084",
 	.product_id = AD4084_CHIP_ID,
@@ -627,6 +640,7 @@ static int ad4080_probe(struct spi_device *spi)
 static const struct spi_device_id ad4080_id[] = {
 	{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
 	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
+	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
 	{ }
 };
@@ -635,6 +649,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
 static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4080", &ad4080_chip_info },
 	{ .compatible = "adi,ad4081", &ad4081_chip_info },
+	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
 	{ }
 };
-- 
2.43.0

[PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4086

[Antoniu Miclaus]

Add device tree binding support for the AD4086 14-bit SAR ADC.
Add adi,ad4086 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4086 has different resolution (14-bit vs 20-bit) and LVDS CNV clock
count maximum (4 vs 7), requiring different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index 9d2b4b8edf42..db136bff45b7 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -29,6 +29,7 @@ properties:
       - adi,ad4081
       - adi,ad4083
       - adi,ad4084
+      - adi,ad4086
 
   reg:
     maxItems: 1
-- 
2.43.0

[PATCH 4/6] iio: adc: ad4080: add support for AD4086

[Antoniu Miclaus]

Add support for AD4086 14-bit SAR ADC. The AD4086 differs from
AD4080 in resolution (14-bit vs 20-bit) and LVDS CNV clock count
maximum (4 vs 7).

Changes:
- Add AD4086_CHIP_ID definition (0x0056)
- Create ad4086_channel with 14-bit resolution and 16-bit storage
- Add ad4086_chip_info with lvds_cnv_clk_cnt_max = 4
- Register AD4086 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index e2cdca2e9174..d6d0688adc3d 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -129,6 +129,7 @@
 #define AD4081_CHIP_ID						0x0051
 #define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
+#define AD4086_CHIP_ID						0x0056
 
 #define AD4080_LVDS_CNV_CLK_CNT_MAX				7
 
@@ -444,6 +445,8 @@ static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16)
 
 static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
 
+static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
+
 static const struct ad4080_chip_info ad4080_chip_info = {
 	.name = "ad4080",
 	.product_id = AD4080_CHIP_ID,
@@ -484,6 +487,16 @@ static const struct ad4080_chip_info ad4084_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4086_chip_info = {
+	.name = "ad4086",
+	.product_id = AD4086_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4086_channel,
+	.lvds_cnv_clk_cnt_max = 4,
+};
+
 static int ad4080_setup(struct iio_dev *indio_dev)
 {
 	struct ad4080_state *st = iio_priv(indio_dev);
@@ -642,6 +655,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
 	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
+	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -651,6 +665,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4081", &ad4081_chip_info },
 	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
+	{ .compatible = "adi,ad4086", &ad4086_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad4080_of_match);
-- 
2.43.0

[PATCH 5/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4087

[Antoniu Miclaus]

Add device tree binding support for the AD4087 14-bit SAR ADC.
Add adi,ad4087 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4087 has different resolution (14-bit vs 20-bit) and LVDS CNV clock
count maximum (1 vs 7), requiring different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index db136bff45b7..ccd6a0ac1539 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -30,6 +30,7 @@ properties:
       - adi,ad4083
       - adi,ad4084
       - adi,ad4086
+      - adi,ad4087
 
   reg:
     maxItems: 1
-- 
2.43.0

[PATCH 6/6] iio: adc: ad4080: add support for AD4087

[Antoniu Miclaus]

Add support for AD4087 14-bit SAR ADC. The AD4087 differs from
AD4080 in resolution (14-bit vs 20-bit) and LVDS CNV clock count
maximum (1 vs 7).

Changes:
- Add AD4087_CHIP_ID definition (0x0057)
- Create ad4087_channel with 14-bit resolution and 16-bit storage
- Add ad4087_chip_info with lvds_cnv_clk_cnt_max = 1
- Register AD4087 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index d6d0688adc3d..7cf3b6ed7940 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -130,6 +130,7 @@
 #define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
 #define AD4086_CHIP_ID						0x0056
+#define AD4087_CHIP_ID						0x0057
 
 #define AD4080_LVDS_CNV_CLK_CNT_MAX				7
 
@@ -447,6 +448,8 @@ static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16)
 
 static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
 
+static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
+
 static const struct ad4080_chip_info ad4080_chip_info = {
 	.name = "ad4080",
 	.product_id = AD4080_CHIP_ID,
@@ -497,6 +500,16 @@ static const struct ad4080_chip_info ad4086_chip_info = {
 	.lvds_cnv_clk_cnt_max = 4,
 };
 
+static const struct ad4080_chip_info ad4087_chip_info = {
+	.name = "ad4087",
+	.product_id = AD4087_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4087_channel,
+	.lvds_cnv_clk_cnt_max = 1,
+};
+
 static int ad4080_setup(struct iio_dev *indio_dev)
 {
 	struct ad4080_state *st = iio_priv(indio_dev);
@@ -656,6 +669,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
+	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -666,6 +680,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
+	{ .compatible = "adi,ad4087", &ad4087_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad4080_of_match);
-- 
2.43.0

Re: [PATCH 0/6] iio: adc: ad4080: add support for AD4083, AD4086, and AD4087

[Conor Dooley]

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On Tue, Oct 21, 2025 at 10:53:42AM +0000, Antoniu Miclaus wrote:

>   dt-bindings: iio: adc: adi,ad4080: add support for AD4083
>   dt-bindings: iio: adc: adi,ad4080: add support for AD4086
>   dt-bindings: iio: adc: adi,ad4080: add support for AD4087

Acked-by: Conor Dooley <conor.dooley@microchip.com>


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Re: [PATCH 0/6] iio: adc: ad4080: add support for AD4083, AD4086, and AD4087

[Jonathan Cameron]

On Wed, 22 Oct 2025 19:02:42 +0100
Conor Dooley <conor@kernel.org> wrote:

> On Tue, Oct 21, 2025 at 10:53:42AM +0000, Antoniu Miclaus wrote:
> 
> >   dt-bindings: iio: adc: adi,ad4080: add support for AD4083
> >   dt-bindings: iio: adc: adi,ad4080: add support for AD4086
> >   dt-bindings: iio: adc: adi,ad4080: add support for AD4087  
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> 

I'd have been fine with this as 1 DT patch and 1 adding the support
given they are all pretty similar. Would have been slightly less work for
everyone ;)  Anyhow, not a big things so applied to the testing branch of
iio.git to let 0-day have a look before I push out as togreg to go into
linux-next.

Thanks

Jonathan