[PATCH 0/2] iio: adc: ad4080: add support for AD4885

[PATCH 0/2] iio: adc: ad4080: add support for AD4885

[Antoniu Miclaus]

Add support for the AD4885, a dual-channel, 16-bit, 10 MSPS SAR ADC in
the AD4080 family. The AD4885 is the dual-channel variant of the AD4085
and, like the AD4884, has two independent ADC channels, each with its
own SPI configuration interface, so the part requires two chip selects
and two io-backends. It runs at a lower maximum throughput than the
AD4884 and therefore uses the same maximum LVDS conversion clock count
as the AD4085.

The first patch adds the devicetree binding compatible string; the
second adds the driver support (chip ID, channel spec, chip info and
device-table entries).

Antoniu Miclaus (2):
  dt-bindings: iio: adc: ad4080: add AD4885 support
  iio: adc: ad4080: add support for AD4885

 .../bindings/iio/adc/adi,ad4080.yaml           |  2 ++
 drivers/iio/adc/ad4080.c                       | 18 ++++++++++++++++++
 2 files changed, 20 insertions(+)


base-commit: edb91bc566576f6664a3efbad6bd4205aa1d5259
-- 
2.43.0

[PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4885 support

[Antoniu Miclaus]

Add AD4885 compatible string to the AD4080 devicetree binding.

The AD4885 is a dual-channel, 16-bit, 10 MSPS SAR ADC, sharing the same
register map and interface as the AD4080 family. Like the AD4884, it
requires two SPI chip selects and two io-backends for its independent
ADC channels. The AD4885 is the dual-channel variant of the AD4085 and
differs from the AD4884 in its maximum throughput and LVDS conversion
clock count, which requires distinct chip configuration in the driver,
precluding a fallback compatible.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index db8467b98e67..07ac4e07f415 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -41,6 +41,7 @@ properties:
       - adi,ad4880
       - adi,ad4883
       - adi,ad4884
+      - adi,ad4885
 
   reg:
     minItems: 1
@@ -105,6 +106,7 @@ allOf:
               - adi,ad4880
               - adi,ad4883
               - adi,ad4884
+              - adi,ad4885
     then:
       properties:
         reg:
-- 
2.43.0

[PATCH 2/2] iio: adc: ad4080: add support for AD4885

[Antoniu Miclaus]

Add support for the AD4885, a dual-channel, 16-bit, 10 MSPS SAR ADC.

The AD4885 is the dual-channel variant of the AD4085, sharing the same
register map and SPI interface as the rest of the AD4080 family. Like
the AD4884, it uses two independent ADC channels, each with its own SPI
configuration interface, but it runs at a lower maximum throughput and
therefore uses the same maximum LVDS conversion clock count as the
AD4085.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 994625a7cf8b..4843ecdd91a8 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -137,6 +137,7 @@
 #define AD4880_CHIP_ID						0x0059
 #define AD4883_CHIP_ID						0x005B
 #define AD4884_CHIP_ID						0x005C
+#define AD4885_CHIP_ID						0x005D
 
 #define AD4080_MAX_CHANNELS					2
 
@@ -561,6 +562,11 @@ static const struct iio_chan_spec ad4884_channels[] = {
 	AD4880_CHANNEL_DEFINE(16, 16, 1),
 };
 
+static const struct iio_chan_spec ad4885_channels[] = {
+	AD4880_CHANNEL_DEFINE(16, 16, 0),
+	AD4880_CHANNEL_DEFINE(16, 16, 1),
+};
+
 static const struct ad4080_chip_info ad4080_chip_info = {
 	.name = "ad4080",
 	.product_id = AD4080_CHIP_ID,
@@ -681,6 +687,16 @@ static const struct ad4080_chip_info ad4884_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4885_chip_info = {
+	.name = "ad4885",
+	.product_id = AD4885_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 2,
+	.channels = ad4885_channels,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static int ad4080_setup_channel(struct ad4080_state *st, unsigned int ch)
 {
 	struct device *dev = regmap_get_device(st->regmap[ch]);
@@ -890,6 +906,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ .name = "ad4880", .driver_data = (kernel_ulong_t)&ad4880_chip_info },
 	{ .name = "ad4883", .driver_data = (kernel_ulong_t)&ad4883_chip_info },
 	{ .name = "ad4884", .driver_data = (kernel_ulong_t)&ad4884_chip_info },
+	{ .name = "ad4885", .driver_data = (kernel_ulong_t)&ad4885_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -907,6 +924,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4880", &ad4880_chip_info },
 	{ .compatible = "adi,ad4883", &ad4883_chip_info },
 	{ .compatible = "adi,ad4884", &ad4884_chip_info },
+	{ .compatible = "adi,ad4885", &ad4885_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad4080_of_match);
-- 
2.43.0

Re: [PATCH 2/2] iio: adc: ad4080: add support for AD4885

[Jonathan Cameron]

On Mon, 7 Sep 2026 13:19:44 +0300
Antoniu Miclaus <antoniu.miclaus@analog.com> wrote:

> Add support for the AD4885, a dual-channel, 16-bit, 10 MSPS SAR ADC.
> 
> The AD4885 is the dual-channel variant of the AD4085, sharing the same
> register map and SPI interface as the rest of the AD4080 family. Like
> the AD4884, it uses two independent ADC channels, each with its own SPI
> configuration interface, but it runs at a lower maximum throughput and
> therefore uses the same maximum LVDS conversion clock count as the
> AD4085.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
LGTM. I'll leave it on list a few days though as we still
need a DT ack.

Jonathan