From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Eason Yang <j2anfernee@gmail.com>
Cc: jic23@kernel.org, lars@metafoo.de, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, dlechner@baylibre.com,
nuno.sa@analog.com, javier.carrasco.cruz@gmail.com,
gstols@baylibre.com, alisadariana@gmail.com,
tgamblin@baylibre.com, olivier.moysan@foss.st.com,
antoniu.miclaus@analog.com, eblanc@baylibre.com,
joao.goncalves@toradex.com, tobias.sperling@softing.com,
marcelo.schmitt@analog.com,
angelogioacchino.delregno@collabora.com,
thomas.bonnefille@bootlin.com, herve.codina@bootlin.com,
chanh@os.amperecomputing.com, KWLIU@nuvoton.com,
yhyang2@nuvoton.com, linux-iio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 2/2] iio: adc: add support for Nuvoton NCT7201
Date: Wed, 16 Apr 2025 12:34:21 +0300 [thread overview]
Message-ID: <Z_95naiV7zpLokPr@smile.fi.intel.com> (raw)
In-Reply-To: <20250416081734.563111-3-j2anfernee@gmail.com>
On Wed, Apr 16, 2025 at 04:17:34PM +0800, Eason Yang wrote:
> Add Nuvoton NCT7201/NCT7202 system voltage monitor 12-bit ADC driver
>
> NCT7201/NCT7202 supports up to 12 analog voltage monitor inputs and up
> to 4 SMBus addresses by ADDR pin. Meanwhile, ALERT# hardware event pins
> for independent alarm signals, and all the threshold values could be set
> for system protection without any timing delay. It also supports reset
> input RSTIN# to recover system from a fault condition.
>
> Currently, only single-edge mode conversion and threshold events are
> supported.
...
> +#define NCT7201_REG_VIN(i) (i)
This doesn't do anything useful. Why do you need this rather useless macro?
...
> +struct nct7201_chip_info {
> + struct device *dev;
This can be derived from the respective regmap. No need to have it here.
> + struct regmap *regmap;
> + struct regmap *regmap16;
> + int num_vin_channels;
> + u16 vin_mask;
> +};
...
> +struct nct7201_adc_model_data {
> + const char *model_name;
> + const struct iio_chan_spec *channels;
> + const int num_channels;
What is the meaning of const here?
> + int num_vin_channels;
> +};
...
> +#define NCT7201_VOLTAGE_CHANNEL(num) \
> + { \
> + .type = IIO_VOLTAGE, \
> + .indexed = 1, \
> + .channel = (num + 1), \
Parentheses are in a wrong place
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
> + .address = num, \
> + .event_spec = nct7201_events, \
> + .num_event_specs = ARRAY_SIZE(nct7201_events), \
> + }
...
> +static int nct7201_write_event_config(struct iio_dev *indio_dev,
> + const struct iio_chan_spec *chan,
> + enum iio_event_type type,
> + enum iio_event_direction dir,
> + bool state)
> +{
> + struct nct7201_chip_info *chip = iio_priv(indio_dev);
> + unsigned int mask;
> + int err;
> +
> + if (chan->type != IIO_VOLTAGE)
> + return -EOPNOTSUPP;
> + mask = BIT(chan->address);
Just join this with the definition above.
> + if (state)
> + chip->vin_mask |= mask;
> + else
> + chip->vin_mask &= ~mask;
> +
> + if (chip->num_vin_channels <= 8)
> + err = regmap_write(chip->regmap, NCT7201_REG_CHANNEL_ENABLE_1,
Remove _1.
> + chip->vin_mask);
> + else
> + err = regmap_bulk_write(chip->regmap, NCT7201_REG_CHANNEL_ENABLE_1,
> + &chip->vin_mask, sizeof(chip->vin_mask));
> + if (err)
> + return err;
> +
> + return 0;
As simple as
return err;
> +}
...
> +static int nct7201_init_chip(struct nct7201_chip_info *chip)
> +{
> + struct device *dev = chip->dev;
Derive this from chip->regmap.
> + __le16 data = cpu_to_le16(NCT7201_REG_CHANNEL_ENABLE_MASK);
> + unsigned int value;
> + int err;
> +
> + err = regmap_write(chip->regmap, NCT7201_REG_CONFIGURATION,
> + NCT7201_BIT_CONFIGURATION_RESET);
> + if (err)
> + return dev_err_probe(dev, err, "Failed to reset chip\n");
> +
> + /*
> + * After about 25 msecs, the device should be ready and then the Power
> + * Up bit will be set to 1. If not, wait for it.
"Up bit" is odd, please be more specific.
> + */
> + fsleep(25000);
+ Blank line.
> + err = regmap_read(chip->regmap, NCT7201_REG_BUSY_STATUS, &value);
> + if (err)
> + return dev_err_probe(dev, err, "Failed to read busy status\n");
> + if (!(value & NCT7201_BIT_PWR_UP))
> + return dev_err_probe(dev, -EIO, "Failed to power up after reset\n");
> +
> + /* Enable Channel */
> + if (chip->num_vin_channels <= 8)
> + err = regmap_write(chip->regmap, NCT7201_REG_CHANNEL_ENABLE_1,
> + NCT7201_REG_CHANNEL_ENABLE_MASK);
> + else
> + err = regmap_bulk_write(chip->regmap, NCT7201_REG_CHANNEL_ENABLE_1,
> + &data, sizeof(data));
> + if (err)
> + return dev_err_probe(dev, err, "Failed to enable channel\n");
> +
> + err = regmap_bulk_read(chip->regmap, NCT7201_REG_CHANNEL_ENABLE_1,
> + &chip->vin_mask, sizeof(chip->vin_mask));
> + if (err)
> + return dev_err_probe(dev, err,
> + "Failed to read channel enable register\n");
> +
> + /* Start monitoring if needed */
> + err = regmap_set_bits(chip->regmap, NCT7201_REG_CONFIGURATION,
> + NCT7201_BIT_CONFIGURATION_START);
> + if (err)
> + return dev_err_probe(dev, err, "Failed to start monitoring\n");
> +
> + return 0;
> +}
...
> + ret = nct7201_init_chip(chip);
> + if (ret < 0)
Why ' < 0' ?
> + return ret;
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2025-04-16 9:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-16 8:17 [PATCH v6 0/2] iio: adc: add Nuvoton NCT7201 ADC driver Eason Yang
2025-04-16 8:17 ` [PATCH v6 1/2] dt-bindings: iio: adc: add NCT7201 ADCs Eason Yang
2025-04-17 6:20 ` Krzysztof Kozlowski
2025-04-16 8:17 ` [PATCH v6 2/2] iio: adc: add support for Nuvoton NCT7201 Eason Yang
2025-04-16 9:34 ` Andy Shevchenko [this message]
2025-04-20 13:03 ` Yu-Hsian Yang
2025-04-20 19:45 ` Andy Shevchenko
2025-04-18 16:13 ` Jonathan Cameron
2025-04-19 15:23 ` Andy Shevchenko
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