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From: Frank Li <Frank.li@oss.nxp.com>
To: nuno.sa@analog.com
Cc: dmaengine@vger.kernel.org, linux-iio@vger.kernel.org,
	Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
	Lars-Peter Clausen <lars@metafoo.de>,
	Jonathan Cameron <jic23@kernel.org>,
	David Lechner <dlechner@baylibre.com>,
	Andy Shevchenko <andy@kernel.org>
Subject: Re: [PATCH 5/9] dmaengine: stm32-dma3: Use bus width capability helpers
Date: Thu, 30 Jul 2026 14:26:02 -0500	[thread overview]
Message-ID: <amulSmk87kV8hHzW@SMW015318> (raw)
In-Reply-To: <20260730-dmaengine-support-wider-dma-masks-v1-5-3732f1f9d9ca@analog.com>

On Thu, Jul 30, 2026 at 03:23:12PM +0100, Nuno Sá via B4 Relay wrote:
> [You don't often get email from devnull+nuno.sa.analog.com@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> From: Nuno Sá <nuno.sa@analog.com>
>
> Advertise the controller-wide bus width capabilities through the new
> dma_set_src_bus_widths() and dma_set_dst_bus_widths() helpers.
>
> Also update the per-channel capability callback to clear unsupported
> widths through the dma_slave_caps helpers so the bitmap and
> transitional legacy fields stay in sync.
>
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/dma/stm32/stm32-dma3.c | 32 ++++++++++++++++++++------------
>  1 file changed, 20 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/dma/stm32/stm32-dma3.c b/drivers/dma/stm32/stm32-dma3.c
> index 4724e7fa0008..b0365a5b341d 100644
> --- a/drivers/dma/stm32/stm32-dma3.c
> +++ b/drivers/dma/stm32/stm32-dma3.c
> @@ -1469,14 +1469,14 @@ static void stm32_dma3_caps(struct dma_chan *c, struct dma_slave_caps *caps)
>
>         if (!chan->fifo_size) {
>                 caps->max_burst = 0;
> -               caps->src_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> -               caps->dst_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> +               dma_slave_caps_clear_src_width(caps, DMA_SLAVE_BUSWIDTH_8_BYTES);
> +               dma_slave_caps_clear_dst_width(caps, DMA_SLAVE_BUSWIDTH_8_BYTES);
>         } else {
>                 /* Burst transfer should not exceed half of the fifo size */
>                 caps->max_burst = chan->max_burst;
>                 if (caps->max_burst < DMA_SLAVE_BUSWIDTH_8_BYTES) {
> -                       caps->src_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> -                       caps->dst_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> +                       dma_slave_caps_clear_src_width(caps, DMA_SLAVE_BUSWIDTH_8_BYTES);
> +                       dma_slave_caps_clear_dst_width(caps, DMA_SLAVE_BUSWIDTH_8_BYTES);
>                 }
>         }
>  }
> @@ -1737,6 +1737,12 @@ static int stm32_dma3_probe(struct platform_device *pdev)
>         u32 master_ports, chan_reserved, i, verr;
>         u64 hwcfgr;
>         int ret;
> +       enum dma_slave_buswidth stm32_dma3_buswidths[] = {
> +               DMA_SLAVE_BUSWIDTH_1_BYTE,
> +               DMA_SLAVE_BUSWIDTH_2_BYTES,
> +               DMA_SLAVE_BUSWIDTH_4_BYTES,
> +               DMA_SLAVE_BUSWIDTH_8_BYTES,
> +       };
>
>         ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
>         if (!ddata)
> @@ -1775,14 +1781,16 @@ static int stm32_dma3_probe(struct platform_device *pdev)
>          * channel, and can only access address at even boundaries, multiple of the buswidth.
>          */
>         dma_dev->copy_align = DMAENGINE_ALIGN_8_BYTES;
> -       dma_dev->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> -                                  BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> -                                  BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> -                                  BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> -       dma_dev->dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> -                                  BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> -                                  BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> -                                  BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> +       ret = dma_set_src_bus_widths(dma_dev, stm32_dma3_buswidths,
> +                                    ARRAY_SIZE(stm32_dma3_buswidths));
> +       if (ret)
> +               return ret;
> +
> +       ret = dma_set_dst_bus_widths(dma_dev, stm32_dma3_buswidths,
> +                                    ARRAY_SIZE(stm32_dma3_buswidths));
> +       if (ret)
> +               return ret;
> +
>         dma_dev->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | BIT(DMA_MEM_TO_MEM);
>
>         dma_dev->descriptor_reuse = true;
>
> --
> 2.55.0
>
>

  reply	other threads:[~2026-07-30 19:26 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-30 14:23 [PATCH 0/9] dmaengine: Support bus widths of 32 bytes and above Nuno Sá via B4 Relay
2026-07-30 14:23 ` [PATCH 1/9] " Nuno Sá via B4 Relay
2026-07-30 19:16   ` Frank Li
2026-07-30 14:23 ` [PATCH 2/9] dmaengine: dma-axi-dmac: Use bus width capability helpers Nuno Sá via B4 Relay
2026-07-30 19:23   ` Frank Li
2026-07-30 14:23 ` [PATCH 3/9] dmaengine: dw-axi-dmac: " Nuno Sá via B4 Relay
2026-07-30 19:24   ` Frank Li
2026-07-30 14:23 ` [PATCH 4/9] dmaengine: qcom: gpi: " Nuno Sá via B4 Relay
2026-07-30 19:25   ` Frank Li
2026-07-30 14:23 ` [PATCH 5/9] dmaengine: stm32-dma3: " Nuno Sá via B4 Relay
2026-07-30 19:26   ` Frank Li [this message]
2026-07-30 14:23 ` [PATCH 6/9] iio: buffer-dmaengine: Use dma_slave_caps bus width accessors Nuno Sá via B4 Relay
2026-07-30 19:27   ` Frank Li
2026-07-30 14:23 ` [PATCH 7/9] ALSA: pcm_dmaengine: Use dma_slave_caps bus width helpers Nuno Sá via B4 Relay
2026-07-30 19:30   ` Frank Li
2026-07-30 14:23 ` [PATCH 8/9] spi: dw: " Nuno Sá via B4 Relay
2026-07-30 19:31   ` Frank Li
2026-07-30 14:23 ` [PATCH 9/9] dmaengine: Drop legacy bus width fields from dma_slave_caps Nuno Sá via B4 Relay
2026-07-30 19:34   ` Frank Li
2026-07-30 19:05 ` [PATCH 0/9] dmaengine: Support bus widths of 32 bytes and above Frank Li

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