From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: David Lechner <dlechner@baylibre.com>,
jic23@kernel.org, nuno.sa@analog.com, andy@kernel.org,
robh@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org
Cc: linux-iio@vger.kernel.org, s32@nxp.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
chester62515@gmail.com, mbrugger@suse.com,
ghennadi.procopciuc@oss.nxp.com
Subject: Re: [PATCH v2 2/2] iio: adc: Add the NXP SAR ADC support for the s32g2/3 platforms
Date: Fri, 12 Sep 2025 01:03:06 +0200 [thread overview]
Message-ID: <ea57a466-97b3-49d4-8d1c-142fd49a0da2@linaro.org> (raw)
In-Reply-To: <d53b22d1-35d6-4fb8-ae56-3ba4953b64af@baylibre.com>
Hi David,
On 11/09/2025 22:10, David Lechner wrote:
> On 9/10/25 10:57 AM, Daniel Lezcano wrote:
[ ... ]
>> + /* iio_push_to_buffers_with_timestamp should not be called
>> + * with dma_samples as parameter. The samples will be smashed
>> + * if timestamp is enabled.
>> + */
>> + timestamp = iio_get_time_ns(indio_dev);
>> + ret = iio_push_to_buffers_with_timestamp(indio_dev,
>> + info->buffer,
>> + timestamp);
>
> Is it OK to call this with spinlock held? It looks like it can call
> devm_krealloc() which may sleep.
>
It should be ok, devm_krealloc is in the code path of
iio_push_to_buffers_with_ts_unaligned(), not in
iio_push_to_buffers_with_timestamp()
> ...
>
>> +static int nxp_sar_adc_probe(struct platform_device *pdev)
>> +{
>> + const struct nxp_sar_adc_data *data;
>> + struct nxp_sar_adc *info;
>> + struct iio_dev *indio_dev;
>> + struct resource *mem;
>> + struct device *dev = &pdev->dev;
>> + int irq;
>> + int ret;
>> +
>> + indio_dev = devm_iio_device_alloc(dev, sizeof(struct nxp_sar_adc));
>> + if (!indio_dev)
>> + return -ENOMEM;
>> +
>> + info = iio_priv(indio_dev);
>> +
>> + data = device_get_match_data(dev);
>> +
>> + info->vref_mV = data->vref_mV;
>> +
>> + info->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
>> + if (IS_ERR(info->regs))
>> + return dev_err_probe(dev, PTR_ERR(info->regs),
>> + "failed to get and remap resource");
>> +
>> + irq = platform_get_irq(pdev, 0);
>> + if (irq < 0)
>> + return irq;
>> +
>> + ret = devm_request_irq(dev, irq, nxp_sar_adc_isr, 0,
>> + dev_name(dev), indio_dev);
>> + if (ret < 0)
>> + return dev_err_probe(dev, ret, "failed requesting irq, irq = %d\n", irq);
>> +
>> + info->regs_phys = mem->start;
>> + spin_lock_init(&info->lock);
>> +
>> + info->clk = devm_clk_get_enabled(dev, "adc");
>
> clock-names was dropped from bindings, so name should be NULL.
Right, I found it when I removed the clock-names from the DT :)
>
>> +static const struct nxp_sar_adc_data s32g2_sar_adc_data = { .vref_mV = 1800 };
>
> Why have this if there is only one option?
There will be the ADC model name/variant in V3.
Thanks!
--
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next prev parent reply other threads:[~2025-09-11 23:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-10 15:57 [PATCH v2 0/2] NXP SAR ADC IIO driver for s32g2/3 platforms Daniel Lezcano
2025-09-10 15:57 ` [PATCH v2 1/2] dt-bindings: iio: adc: Add the NXP SAR ADC " Daniel Lezcano
2025-09-10 15:57 ` [PATCH v2 2/2] iio: adc: Add the NXP SAR ADC support for the " Daniel Lezcano
2025-09-10 17:32 ` Jonathan Cameron
2025-09-11 12:55 ` Daniel Lezcano
2025-09-11 13:26 ` David Lechner
2025-09-12 14:17 ` Jonathan Cameron
2025-09-12 15:10 ` Nuno Sá
2025-09-12 14:18 ` Jonathan Cameron
2025-09-11 20:10 ` David Lechner
2025-09-11 23:03 ` Daniel Lezcano [this message]
2025-09-12 5:38 ` Andy Shevchenko
2025-09-12 8:19 ` Nuno Sá
2025-09-12 14:21 ` Jonathan Cameron
2025-09-12 6:00 ` Andy Shevchenko
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