[RESEND PATCH 0/4] Input: imx6ul_tsc - set glitch threshold by dts property

[RESEND PATCH 0/4] Input: imx6ul_tsc - set glitch threshold by dts property

[Dario Binacchi]

The series allows setting the glitch threshold for the detected signal
from a DTS property instead of a hardcoded value.
In addition, I applied a patch that replaces opencoded masking and
shifting, with BIT(), GENMASK(), FIELD_GET() and FIELD_PREP() macros.


Dario Binacchi (3):
  dt-bindings: input: touchscreen: fsl,imx6ul-tsc: add
    fsl,glitch-threshold
  Input: imx6ul_tsc - set glitch threshold by DTS property
  Input: imx6ul_tsc - use BIT, FIELD_{GET,PREP} and GENMASK macros

Michael Trimarchi (1):
  Input: imx6ul_tsc - fix typo in register name

 .../input/touchscreen/fsl,imx6ul-tsc.yaml     |  18 +++
 drivers/input/touchscreen/imx6ul_tsc.c        | 112 +++++++++++-------
 2 files changed, 86 insertions(+), 44 deletions(-)

-- 
2.43.0

base-commit: 9dd1835ecda5b96ac88c166f4a87386f3e727bd9
branch: tsc_de_glitch

[RESEND PATCH 1/4] Input: imx6ul_tsc - fix typo in register name

[Dario Binacchi]

From: Michael Trimarchi <michael@amarulasolutions.com>

Replace 'SETING' with 'SETTING'.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

 drivers/input/touchscreen/imx6ul_tsc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/input/touchscreen/imx6ul_tsc.c b/drivers/input/touchscreen/imx6ul_tsc.c
index 6ac8fa84ed9f..c2c6e50efc54 100644
--- a/drivers/input/touchscreen/imx6ul_tsc.c
+++ b/drivers/input/touchscreen/imx6ul_tsc.c
@@ -55,7 +55,7 @@
 #define ADC_TIMEOUT		msecs_to_jiffies(100)
 
 /* TSC registers */
-#define REG_TSC_BASIC_SETING	0x00
+#define REG_TSC_BASIC_SETTING	0x00
 #define REG_TSC_PRE_CHARGE_TIME	0x10
 #define REG_TSC_FLOW_CONTROL	0x20
 #define REG_TSC_MEASURE_VALUE	0x30
@@ -192,7 +192,7 @@ static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
 
 	basic_setting |= tsc->measure_delay_time << 8;
 	basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
-	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
+	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETTING);
 
 	writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
 
-- 
2.43.0

[RESEND PATCH 2/4] dt-bindings: input: touchscreen: fsl,imx6ul-tsc: add fsl,glitch-threshold

[Dario Binacchi]

Add support for glitch threshold configuration. A detected signal is valid
only if it lasts longer than the set threshold; otherwise, it is regarded
as a glitch.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

 .../input/touchscreen/fsl,imx6ul-tsc.yaml      | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml
index 678756ad0f92..2fee2940213f 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml
+++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml
@@ -62,6 +62,23 @@ properties:
     description: Number of data samples which are averaged for each read.
     enum: [ 1, 4, 8, 16, 32 ]
 
+  fsl,glitch-threshold:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    default: 0
+    enum: [ 0, 1, 2, 3 ]
+    description: |
+      Indicates the glitch threshold. The threshold is defined by number
+      of clock cycles. A detect signal is only valid if it is exist longer
+      than threshold; otherwise, it is regarded as a glitch.
+      0: Normal function: 8191 clock cycles
+         Low power mode: 9 clock cycles
+      1: Normal function: 4095 clock cycles
+         Low power mode: 7 clock cycles
+      2: Normal function: 2047 clock cycles
+         Low power mode: 5 clock cycles
+      3: Normal function: 1023 clock cycles
+         Low power mode: 3 clock cycles
+
 required:
   - compatible
   - reg
@@ -94,4 +111,5 @@ examples:
         measure-delay-time = <0xfff>;
         pre-charge-time = <0xffff>;
         touchscreen-average-samples = <32>;
+        fsl,glitch-threshold = <2>;
     };
-- 
2.43.0

[RESEND PATCH 3/4] Input: imx6ul_tsc - set glitch threshold by DTS property

[Dario Binacchi]

Set the glitch threshold previously hardcoded in the driver. The change
is backward compatible.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

 drivers/input/touchscreen/imx6ul_tsc.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/input/touchscreen/imx6ul_tsc.c b/drivers/input/touchscreen/imx6ul_tsc.c
index c2c6e50efc54..a6066643bd48 100644
--- a/drivers/input/touchscreen/imx6ul_tsc.c
+++ b/drivers/input/touchscreen/imx6ul_tsc.c
@@ -7,6 +7,7 @@
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/bitfield.h>
 #include <linux/gpio/consumer.h>
 #include <linux/input.h>
 #include <linux/slab.h>
@@ -74,7 +75,8 @@
 #define MEASURE_INT_EN		0x1
 #define MEASURE_SIG_EN		0x1
 #define VALID_SIG_EN		(0x1 << 8)
-#define DE_GLITCH_2		(0x2 << 29)
+#define DE_GLITCH_MASK		GENMASK(30, 29)
+#define DE_GLITCH_DEF		0x02
 #define START_SENSE		(0x1 << 12)
 #define TSC_DISABLE		(0x1 << 16)
 #define DETECT_MODE		0x2
@@ -92,6 +94,7 @@ struct imx6ul_tsc {
 	u32 pre_charge_time;
 	bool average_enable;
 	u32 average_select;
+	u32 de_glitch;
 
 	struct completion completion;
 };
@@ -188,13 +191,15 @@ static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
 static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
 {
 	u32 basic_setting = 0;
+	u32 debug_mode2;
 	u32 start;
 
 	basic_setting |= tsc->measure_delay_time << 8;
 	basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
 	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETTING);
 
-	writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
+	debug_mode2 = FIELD_PREP(DE_GLITCH_MASK, tsc->de_glitch);
+	writel(debug_mode2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
 
 	writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
 	writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
@@ -501,6 +506,17 @@ static int imx6ul_tsc_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
+	err = of_property_read_u32(np, "fsl,glitch-threshold", &tsc->de_glitch);
+	if (err)
+		tsc->de_glitch = DE_GLITCH_DEF;
+
+	if (tsc->de_glitch > FIELD_MAX(DE_GLITCH_MASK)) {
+		dev_err(&pdev->dev,
+			"fsl,glitch-threshold (%u) must be less or equal to %lu\n",
+			tsc->de_glitch, FIELD_MAX(DE_GLITCH_MASK));
+		return -EINVAL;
+	}
+
 	err = input_register_device(tsc->input);
 	if (err) {
 		dev_err(&pdev->dev,
-- 
2.43.0

[RESEND PATCH 4/4] Input: imx6ul_tsc - use BIT, FIELD_{GET,PREP} and GENMASK macros

[Dario Binacchi]

Replace opencoded masking and shifting, with BIT(), GENMASK(),
FIELD_GET() and FIELD_PREP() macros.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

 drivers/input/touchscreen/imx6ul_tsc.c | 88 ++++++++++++++------------
 1 file changed, 48 insertions(+), 40 deletions(-)

diff --git a/drivers/input/touchscreen/imx6ul_tsc.c b/drivers/input/touchscreen/imx6ul_tsc.c
index a6066643bd48..e74999c5e22f 100644
--- a/drivers/input/touchscreen/imx6ul_tsc.c
+++ b/drivers/input/touchscreen/imx6ul_tsc.c
@@ -21,25 +21,23 @@
 #include <linux/log2.h>
 
 /* ADC configuration registers field define */
-#define ADC_AIEN		(0x1 << 7)
+#define ADC_AIEN		BIT(7)
+#define ADC_ADCH_MASK		GENMASK(4, 0)
 #define ADC_CONV_DISABLE	0x1F
-#define ADC_AVGE		(0x1 << 5)
-#define ADC_CAL			(0x1 << 7)
-#define ADC_CALF		0x2
-#define ADC_12BIT_MODE		(0x2 << 2)
-#define ADC_CONV_MODE_MASK	(0x3 << 2)
+#define ADC_AVGE		BIT(5)
+#define ADC_CAL			BIT(7)
+#define ADC_CALF		BIT(1)
+#define ADC_CONV_MODE_MASK	GENMASK(3, 2)
+#define ADC_12BIT_MODE		0x2
 #define ADC_IPG_CLK		0x00
-#define ADC_INPUT_CLK_MASK	0x3
-#define ADC_CLK_DIV_8		(0x03 << 5)
-#define ADC_CLK_DIV_MASK	(0x3 << 5)
-#define ADC_SHORT_SAMPLE_MODE	(0x0 << 4)
-#define ADC_SAMPLE_MODE_MASK	(0x1 << 4)
-#define ADC_HARDWARE_TRIGGER	(0x1 << 13)
-#define ADC_AVGS_SHIFT		14
-#define ADC_AVGS_MASK		(0x3 << 14)
+#define ADC_INPUT_CLK_MASK	GENMASK(1, 0)
+#define ADC_CLK_DIV_8		0x03
+#define ADC_CLK_DIV_MASK	GENMASK(6, 5)
+#define ADC_SAMPLE_MODE		BIT(4)
+#define ADC_HARDWARE_TRIGGER	BIT(13)
+#define ADC_AVGS_MASK		GENMASK(15, 14)
 #define SELECT_CHANNEL_4	0x04
 #define SELECT_CHANNEL_1	0x01
-#define DISABLE_CONVERSION_INT	(0x0 << 7)
 
 /* ADC registers */
 #define REG_ADC_HC0		0x00
@@ -66,20 +64,26 @@
 #define REG_TSC_DEBUG_MODE	0x70
 #define REG_TSC_DEBUG_MODE2	0x80
 
+/* TSC_MEASURE_VALUE register field define */
+#define X_VALUE_MASK		GENMASK(27, 16)
+#define Y_VALUE_MASK		GENMASK(11, 0)
+
 /* TSC configuration registers field define */
-#define DETECT_4_WIRE_MODE	(0x0 << 4)
-#define AUTO_MEASURE		0x1
-#define MEASURE_SIGNAL		0x1
-#define DETECT_SIGNAL		(0x1 << 4)
-#define VALID_SIGNAL		(0x1 << 8)
-#define MEASURE_INT_EN		0x1
-#define MEASURE_SIG_EN		0x1
-#define VALID_SIG_EN		(0x1 << 8)
+#define MEASURE_DELAY_TIME_MASK	GENMASK(31, 8)
+#define DETECT_5_WIRE_MODE	BIT(4)
+#define AUTO_MEASURE		BIT(0)
+#define MEASURE_SIGNAL		BIT(0)
+#define DETECT_SIGNAL		BIT(4)
+#define VALID_SIGNAL		BIT(8)
+#define MEASURE_INT_EN		BIT(0)
+#define MEASURE_SIG_EN		BIT(0)
+#define VALID_SIG_EN		BIT(8)
 #define DE_GLITCH_MASK		GENMASK(30, 29)
 #define DE_GLITCH_DEF		0x02
-#define START_SENSE		(0x1 << 12)
-#define TSC_DISABLE		(0x1 << 16)
+#define START_SENSE		BIT(12)
+#define TSC_DISABLE		BIT(16)
 #define DETECT_MODE		0x2
+#define STATE_MACHINE_MASK	GENMASK(22, 20)
 
 struct imx6ul_tsc {
 	struct device *dev;
@@ -115,19 +119,20 @@ static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
 
 	adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
 	adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK);
-	adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
-	adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK);
-	adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
+	adc_cfg |= FIELD_PREP(ADC_CONV_MODE_MASK, ADC_12BIT_MODE) |
+		FIELD_PREP(ADC_INPUT_CLK_MASK, ADC_IPG_CLK);
+	adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE);
+	adc_cfg |= FIELD_PREP(ADC_CLK_DIV_MASK, ADC_CLK_DIV_8);
 	if (tsc->average_enable) {
 		adc_cfg &= ~ADC_AVGS_MASK;
-		adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT;
+		adc_cfg |= FIELD_PREP(ADC_AVGS_MASK, tsc->average_select);
 	}
 	adc_cfg &= ~ADC_HARDWARE_TRIGGER;
 	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
 
 	/* enable calibration interrupt */
 	adc_hc |= ADC_AIEN;
-	adc_hc |= ADC_CONV_DISABLE;
+	adc_hc |= FIELD_PREP(ADC_ADCH_MASK, ADC_CONV_DISABLE);
 	writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
 
 	/* start ADC calibration */
@@ -167,19 +172,21 @@ static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
 {
 	u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
 
-	adc_hc0 = DISABLE_CONVERSION_INT;
+	adc_hc0 = FIELD_PREP(ADC_AIEN, 0);
 	writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
 
-	adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
+	adc_hc1 = FIELD_PREP(ADC_AIEN, 0) |
+		FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_4);
 	writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
 
-	adc_hc2 = DISABLE_CONVERSION_INT;
+	adc_hc2 = FIELD_PREP(ADC_AIEN, 0);
 	writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
 
-	adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
+	adc_hc3 = FIELD_PREP(ADC_AIEN, 0) |
+		FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_1);
 	writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
 
-	adc_hc4 = DISABLE_CONVERSION_INT;
+	adc_hc4 = FIELD_PREP(ADC_AIEN, 0);
 	writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
 }
 
@@ -194,8 +201,9 @@ static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
 	u32 debug_mode2;
 	u32 start;
 
-	basic_setting |= tsc->measure_delay_time << 8;
-	basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
+	basic_setting |= FIELD_PREP(MEASURE_DELAY_TIME_MASK,
+				    tsc->measure_delay_time);
+	basic_setting |= AUTO_MEASURE;
 	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETTING);
 
 	debug_mode2 = FIELD_PREP(DE_GLITCH_MASK, tsc->de_glitch);
@@ -255,7 +263,7 @@ static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
 
 		usleep_range(200, 400);
 		debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
-		state_machine = (debug_mode2 >> 20) & 0x7;
+		state_machine = FIELD_GET(STATE_MACHINE_MASK, debug_mode2);
 	} while (state_machine != DETECT_MODE);
 
 	usleep_range(200, 400);
@@ -283,8 +291,8 @@ static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
 
 	if (status & MEASURE_SIGNAL) {
 		value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
-		x = (value >> 16) & 0x0fff;
-		y = value & 0x0fff;
+		x = FIELD_GET(X_VALUE_MASK, value);
+		y = FIELD_GET(Y_VALUE_MASK, value);
 
 		/*
 		 * In detect mode, we can get the xnur gpio value,
-- 
2.43.0

Re: [RESEND PATCH 2/4] dt-bindings: input: touchscreen: fsl,imx6ul-tsc: add fsl,glitch-threshold

[Frank Li]

On Wed, Sep 10, 2025 at 03:58:36PM +0200, Dario Binacchi wrote:
> Add support for glitch threshold configuration. A detected signal is valid
> only if it lasts longer than the set threshold; otherwise, it is regarded
> as a glitch.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> ---
>
>  .../input/touchscreen/fsl,imx6ul-tsc.yaml      | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml
> index 678756ad0f92..2fee2940213f 100644
> --- a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml
> +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml
> @@ -62,6 +62,23 @@ properties:
>      description: Number of data samples which are averaged for each read.
>      enum: [ 1, 4, 8, 16, 32 ]
>
> +  fsl,glitch-threshold:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    default: 0
> +    enum: [ 0, 1, 2, 3 ]
> +    description: |
> +      Indicates the glitch threshold. The threshold is defined by number
> +      of clock cycles. A detect signal is only valid if it is exist longer
> +      than threshold; otherwise, it is regarded as a glitch.
> +      0: Normal function: 8191 clock cycles
> +         Low power mode: 9 clock cycles
> +      1: Normal function: 4095 clock cycles
> +         Low power mode: 7 clock cycles
> +      2: Normal function: 2047 clock cycles
> +         Low power mode: 5 clock cycles
> +      3: Normal function: 1023 clock cycles
> +         Low power mode: 3 clock cycles
> +

does any property in input/touchscreen/touchscreen.yaml use as it?

Suppose all touch screen have similar property to filiter out glitch.

Frank

>  required:
>    - compatible
>    - reg
> @@ -94,4 +111,5 @@ examples:
>          measure-delay-time = <0xfff>;
>          pre-charge-time = <0xffff>;
>          touchscreen-average-samples = <32>;
> +        fsl,glitch-threshold = <2>;
>      };
> --
> 2.43.0
>

Re: [RESEND PATCH 1/4] Input: imx6ul_tsc - fix typo in register name

[Frank Li]

On Wed, Sep 10, 2025 at 03:58:35PM +0200, Dario Binacchi wrote:
> From: Michael Trimarchi <michael@amarulasolutions.com>
>
> Replace 'SETING' with 'SETTING'.
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> ---
>
>  drivers/input/touchscreen/imx6ul_tsc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/input/touchscreen/imx6ul_tsc.c b/drivers/input/touchscreen/imx6ul_tsc.c
> index 6ac8fa84ed9f..c2c6e50efc54 100644
> --- a/drivers/input/touchscreen/imx6ul_tsc.c
> +++ b/drivers/input/touchscreen/imx6ul_tsc.c
> @@ -55,7 +55,7 @@
>  #define ADC_TIMEOUT		msecs_to_jiffies(100)
>
>  /* TSC registers */
> -#define REG_TSC_BASIC_SETING	0x00
> +#define REG_TSC_BASIC_SETTING	0x00
>  #define REG_TSC_PRE_CHARGE_TIME	0x10
>  #define REG_TSC_FLOW_CONTROL	0x20
>  #define REG_TSC_MEASURE_VALUE	0x30
> @@ -192,7 +192,7 @@ static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
>
>  	basic_setting |= tsc->measure_delay_time << 8;
>  	basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
> -	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
> +	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETTING);
>
>  	writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
>
> --
> 2.43.0
>

Re: [RESEND PATCH 4/4] Input: imx6ul_tsc - use BIT, FIELD_{GET,PREP} and GENMASK macros

[Frank Li]

On Wed, Sep 10, 2025 at 03:58:38PM +0200, Dario Binacchi wrote:
> Replace opencoded masking and shifting, with BIT(), GENMASK(),
> FIELD_GET() and FIELD_PREP() macros.

Add "No functional change." to help filter out if need bisect.

>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>
> ---

This cleanup patch should follow patch1, which is typo fix.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
>  drivers/input/touchscreen/imx6ul_tsc.c | 88 ++++++++++++++------------
>  1 file changed, 48 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/input/touchscreen/imx6ul_tsc.c b/drivers/input/touchscreen/imx6ul_tsc.c
> index a6066643bd48..e74999c5e22f 100644
> --- a/drivers/input/touchscreen/imx6ul_tsc.c
> +++ b/drivers/input/touchscreen/imx6ul_tsc.c
> @@ -21,25 +21,23 @@
>  #include <linux/log2.h>
>
>  /* ADC configuration registers field define */
> -#define ADC_AIEN		(0x1 << 7)
> +#define ADC_AIEN		BIT(7)
> +#define ADC_ADCH_MASK		GENMASK(4, 0)
>  #define ADC_CONV_DISABLE	0x1F
> -#define ADC_AVGE		(0x1 << 5)
> -#define ADC_CAL			(0x1 << 7)
> -#define ADC_CALF		0x2
> -#define ADC_12BIT_MODE		(0x2 << 2)
> -#define ADC_CONV_MODE_MASK	(0x3 << 2)
> +#define ADC_AVGE		BIT(5)
> +#define ADC_CAL			BIT(7)
> +#define ADC_CALF		BIT(1)
> +#define ADC_CONV_MODE_MASK	GENMASK(3, 2)
> +#define ADC_12BIT_MODE		0x2
>  #define ADC_IPG_CLK		0x00
> -#define ADC_INPUT_CLK_MASK	0x3
> -#define ADC_CLK_DIV_8		(0x03 << 5)
> -#define ADC_CLK_DIV_MASK	(0x3 << 5)
> -#define ADC_SHORT_SAMPLE_MODE	(0x0 << 4)
> -#define ADC_SAMPLE_MODE_MASK	(0x1 << 4)
> -#define ADC_HARDWARE_TRIGGER	(0x1 << 13)
> -#define ADC_AVGS_SHIFT		14
> -#define ADC_AVGS_MASK		(0x3 << 14)
> +#define ADC_INPUT_CLK_MASK	GENMASK(1, 0)
> +#define ADC_CLK_DIV_8		0x03
> +#define ADC_CLK_DIV_MASK	GENMASK(6, 5)
> +#define ADC_SAMPLE_MODE		BIT(4)
> +#define ADC_HARDWARE_TRIGGER	BIT(13)
> +#define ADC_AVGS_MASK		GENMASK(15, 14)
>  #define SELECT_CHANNEL_4	0x04
>  #define SELECT_CHANNEL_1	0x01
> -#define DISABLE_CONVERSION_INT	(0x0 << 7)
>
>  /* ADC registers */
>  #define REG_ADC_HC0		0x00
> @@ -66,20 +64,26 @@
>  #define REG_TSC_DEBUG_MODE	0x70
>  #define REG_TSC_DEBUG_MODE2	0x80
>
> +/* TSC_MEASURE_VALUE register field define */
> +#define X_VALUE_MASK		GENMASK(27, 16)
> +#define Y_VALUE_MASK		GENMASK(11, 0)
> +
>  /* TSC configuration registers field define */
> -#define DETECT_4_WIRE_MODE	(0x0 << 4)
> -#define AUTO_MEASURE		0x1
> -#define MEASURE_SIGNAL		0x1
> -#define DETECT_SIGNAL		(0x1 << 4)
> -#define VALID_SIGNAL		(0x1 << 8)
> -#define MEASURE_INT_EN		0x1
> -#define MEASURE_SIG_EN		0x1
> -#define VALID_SIG_EN		(0x1 << 8)
> +#define MEASURE_DELAY_TIME_MASK	GENMASK(31, 8)
> +#define DETECT_5_WIRE_MODE	BIT(4)
> +#define AUTO_MEASURE		BIT(0)
> +#define MEASURE_SIGNAL		BIT(0)
> +#define DETECT_SIGNAL		BIT(4)
> +#define VALID_SIGNAL		BIT(8)
> +#define MEASURE_INT_EN		BIT(0)
> +#define MEASURE_SIG_EN		BIT(0)
> +#define VALID_SIG_EN		BIT(8)
>  #define DE_GLITCH_MASK		GENMASK(30, 29)
>  #define DE_GLITCH_DEF		0x02
> -#define START_SENSE		(0x1 << 12)
> -#define TSC_DISABLE		(0x1 << 16)
> +#define START_SENSE		BIT(12)
> +#define TSC_DISABLE		BIT(16)
>  #define DETECT_MODE		0x2
> +#define STATE_MACHINE_MASK	GENMASK(22, 20)
>
>  struct imx6ul_tsc {
>  	struct device *dev;
> @@ -115,19 +119,20 @@ static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
>
>  	adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
>  	adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK);
> -	adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
> -	adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK);
> -	adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
> +	adc_cfg |= FIELD_PREP(ADC_CONV_MODE_MASK, ADC_12BIT_MODE) |
> +		FIELD_PREP(ADC_INPUT_CLK_MASK, ADC_IPG_CLK);
> +	adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE);
> +	adc_cfg |= FIELD_PREP(ADC_CLK_DIV_MASK, ADC_CLK_DIV_8);
>  	if (tsc->average_enable) {
>  		adc_cfg &= ~ADC_AVGS_MASK;
> -		adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT;
> +		adc_cfg |= FIELD_PREP(ADC_AVGS_MASK, tsc->average_select);
>  	}
>  	adc_cfg &= ~ADC_HARDWARE_TRIGGER;
>  	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
>
>  	/* enable calibration interrupt */
>  	adc_hc |= ADC_AIEN;
> -	adc_hc |= ADC_CONV_DISABLE;
> +	adc_hc |= FIELD_PREP(ADC_ADCH_MASK, ADC_CONV_DISABLE);
>  	writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
>
>  	/* start ADC calibration */
> @@ -167,19 +172,21 @@ static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
>  {
>  	u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
>
> -	adc_hc0 = DISABLE_CONVERSION_INT;
> +	adc_hc0 = FIELD_PREP(ADC_AIEN, 0);
>  	writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
>
> -	adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
> +	adc_hc1 = FIELD_PREP(ADC_AIEN, 0) |
> +		FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_4);
>  	writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
>
> -	adc_hc2 = DISABLE_CONVERSION_INT;
> +	adc_hc2 = FIELD_PREP(ADC_AIEN, 0);
>  	writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
>
> -	adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
> +	adc_hc3 = FIELD_PREP(ADC_AIEN, 0) |
> +		FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_1);
>  	writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
>
> -	adc_hc4 = DISABLE_CONVERSION_INT;
> +	adc_hc4 = FIELD_PREP(ADC_AIEN, 0);
>  	writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
>  }
>
> @@ -194,8 +201,9 @@ static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
>  	u32 debug_mode2;
>  	u32 start;
>
> -	basic_setting |= tsc->measure_delay_time << 8;
> -	basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
> +	basic_setting |= FIELD_PREP(MEASURE_DELAY_TIME_MASK,
> +				    tsc->measure_delay_time);
> +	basic_setting |= AUTO_MEASURE;
>  	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETTING);
>
>  	debug_mode2 = FIELD_PREP(DE_GLITCH_MASK, tsc->de_glitch);
> @@ -255,7 +263,7 @@ static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
>
>  		usleep_range(200, 400);
>  		debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
> -		state_machine = (debug_mode2 >> 20) & 0x7;
> +		state_machine = FIELD_GET(STATE_MACHINE_MASK, debug_mode2);
>  	} while (state_machine != DETECT_MODE);
>
>  	usleep_range(200, 400);
> @@ -283,8 +291,8 @@ static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
>
>  	if (status & MEASURE_SIGNAL) {
>  		value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
> -		x = (value >> 16) & 0x0fff;
> -		y = value & 0x0fff;
> +		x = FIELD_GET(X_VALUE_MASK, value);
> +		y = FIELD_GET(Y_VALUE_MASK, value);
>
>  		/*
>  		 * In detect mode, we can get the xnur gpio value,
> --
> 2.43.0
>