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From: Lu Baolu <baolu.lu@linux.intel.com>
To: Liu Yi L <yi.l.liu@intel.com>, iommu@lists.linux-foundation.org
Cc: yi.y.sun@intel.com, jun.j.tian@intel.com
Subject: Re: [PATCH v1 3/3] iommu/vt-d: Fix Unexpected page request in Privilege Mode
Date: Tue, 17 Aug 2021 20:49:12 +0800	[thread overview]
Message-ID: <03b53572-5e51-28f6-8cd6-8f516bbfc1a6@linux.intel.com> (raw)
In-Reply-To: <20210817042425.1784279-4-yi.l.liu@intel.com>

On 2021/8/17 12:24, Liu Yi L wrote:
> This patch fixes the below error. This is due to improper iotlb invalidation
> in intel_pasid_tear_down_entry().
> 
> [  180.187556] Unexpected page request in Privilege Mode
> [  180.187565] Unexpected page request in Privilege Mode
> [  180.279933] Unexpected page request in Privilege Mode
> [  180.279937] Unexpected page request in Privilege Mode
> 
> Per chapter 6.5.3.3 of VT-d spec 3.3, when tear down a pasid entry, software
> should use Domain selective IOTLB flush if the PGTT of the pasid entry is
> SL only or Nested, while for the pasid entries whose PGTT is FL only or PT
> using PASID-based IOTLB flush is enough.
> 
> Fixes: 1c4f88b7f1f9 ("iommu/vt-d: Shared virtual address in scalable mode")
> Cc: Lu Baolu<baolu.lu@linux.intel.com>
> Signed-off-by: Kumar Sanjay K<sanjay.k.kumar@intel.com>
> Signed-off-by: Liu Yi L<yi.l.liu@intel.com>
> Tested-by: Yi Sun<yi.y.sun@intel.com>

Good catch! Thanks!

It has been queued for iommu/fix.

Best regards,
baolu
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      reply	other threads:[~2021-08-17 12:49 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-17  4:24 [PATCH v1 0/3] Misc fixes to intel iommu driver Liu Yi L
2021-08-17  4:24 ` [PATCH v1 1/3] iommu/vt-d: Using pasid_pte_is_present() helper function Liu Yi L
2021-08-17  4:24 ` [PATCH v1 2/3] iommu/vt-d: Add present bit check in pasid entry setup helper functions Liu Yi L
2021-08-17  4:24 ` [PATCH v1 3/3] iommu/vt-d: Fix Unexpected page request in Privilege Mode Liu Yi L
2021-08-17 12:49   ` Lu Baolu [this message]

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