From: Auger Eric <eric.auger@redhat.com>
To: Vivek Gautam <vivek.gautam@arm.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
iommu@lists.linux-foundation.org,
virtualization@lists.linux-foundation.org
Cc: jean-philippe@linaro.org, kevin.tian@intel.com, mst@redhat.com,
will.deacon@arm.com, alex.williamson@redhat.com,
robin.murphy@arm.com
Subject: Re: [PATCH 2/2] iommu: arm-smmu-v3: Report domain nesting info reuqired for stage1
Date: Fri, 12 Feb 2021 19:13:43 +0100 [thread overview]
Message-ID: <0708b0b2-78f7-e55c-21a7-3c49eb5141df@redhat.com> (raw)
In-Reply-To: <20210212105859.8445-3-vivek.gautam@arm.com>
Hi Vivek,
On 2/12/21 11:58 AM, Vivek Gautam wrote:
> Update nested domain information required for stage1 page table.
s/reuqired/required in the commit title
>
> Signed-off-by: Vivek Gautam <vivek.gautam@arm.com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index c11dd3940583..728018921fae 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -2555,6 +2555,7 @@ static int arm_smmu_domain_nesting_info(struct arm_smmu_domain *smmu_domain,
> void *data)
> {
> struct iommu_nesting_info *info = (struct iommu_nesting_info *)data;
> + struct arm_smmu_device *smmu = smmu_domain->smmu;
> unsigned int size;
>
> if (!info || smmu_domain->stage != ARM_SMMU_DOMAIN_NESTED)
> @@ -2571,9 +2572,20 @@ static int arm_smmu_domain_nesting_info(struct arm_smmu_domain *smmu_domain,
> return 0;
> }
>
> - /* report an empty iommu_nesting_info for now */
> - memset(info, 0x0, size);
> + /* Update the nesting info as required for stage1 page tables */
> + info->addr_width = smmu->ias;
> + info->format = IOMMU_PASID_FORMAT_ARM_SMMU_V3;
> + info->features = IOMMU_NESTING_FEAT_BIND_PGTBL |
I understood IOMMU_NESTING_FEAT_BIND_PGTBL advertises the requirement to
bind tables per PASID, ie. passing iommu_gpasid_bind_data.
In ARM case I guess you plan to use attach/detach_pasid_table API with
iommu_pasid_table_config struct. So I understood we should add a new
feature here.
> + IOMMU_NESTING_FEAT_PAGE_RESP |
> + IOMMU_NESTING_FEAT_CACHE_INVLD;
> + info->pasid_bits = smmu->ssid_bits;
> + info->vendor.smmuv3.asid_bits = smmu->asid_bits;
> + info->vendor.smmuv3.pgtbl_fmt = ARM_64_LPAE_S1;
> + memset(&info->padding, 0x0, 12);
> + memset(&info->vendor.smmuv3.padding, 0x0, 9);
> +
> info->argsz = size;
> +
spurious new line
> return 0;
> }
>
>
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next prev parent reply other threads:[~2021-02-12 18:14 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-12 10:58 [PATCH 0/2] Domain nesting info for arm-smmu Vivek Gautam
2021-02-12 10:58 ` [PATCH 1/2] iommu: Report domain nesting info for arm-smmu-v3 Vivek Gautam
2021-02-12 18:13 ` Auger Eric
2021-03-03 9:55 ` Vivek Kumar Gautam
2021-02-12 10:58 ` [PATCH 2/2] iommu: arm-smmu-v3: Report domain nesting info reuqired for stage1 Vivek Gautam
2021-02-12 18:13 ` Auger Eric [this message]
2021-03-03 6:22 ` Vivek Gautam
2021-03-03 9:57 ` Vivek Kumar Gautam
2021-02-12 18:16 ` Auger Eric
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