From: Ross Philipson <ross.philipson@oracle.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org,
linux-integrity@vger.kernel.org, linux-doc@vger.kernel.org,
linux-crypto@vger.kernel.org, kexec@lists.infradead.org
Cc: dpsmith@apertussolutions.com, ross.philipson@oracle.com,
nivedita@alum.mit.edu, luto@amacapital.net,
iommu@lists.linux-foundation.org, mingo@redhat.com, bp@alien8.de,
hpa@zytor.com, kanth.ghatraju@oracle.com, tglx@linutronix.de,
trenchboot-devel@googlegroups.com
Subject: [PATCH v5 09/12] kexec: Secure Launch kexec SEXIT support
Date: Wed, 16 Feb 2022 22:54:42 -0500 [thread overview]
Message-ID: <1645070085-14255-10-git-send-email-ross.philipson@oracle.com> (raw)
In-Reply-To: <1645070085-14255-1-git-send-email-ross.philipson@oracle.com>
Prior to running the next kernel via kexec, the Secure Launch code
closes down private SMX resources and does an SEXIT. This allows the
next kernel to start normally without any issues starting the APs etc.
Signed-off-by: Ross Philipson <ross.philipson@oracle.com>
---
arch/x86/kernel/slaunch.c | 69 +++++++++++++++++++++++++++++++++++++++++++++++
kernel/kexec_core.c | 4 +++
2 files changed, 73 insertions(+)
diff --git a/arch/x86/kernel/slaunch.c b/arch/x86/kernel/slaunch.c
index ef6ef08..d3ea491 100644
--- a/arch/x86/kernel/slaunch.c
+++ b/arch/x86/kernel/slaunch.c
@@ -465,3 +465,72 @@ void __init slaunch_setup_txt(void)
pr_info("Intel TXT setup complete\n");
}
+
+static inline void smx_getsec_sexit(void)
+{
+ asm volatile (".byte 0x0f,0x37\n"
+ : : "a" (SMX_X86_GETSEC_SEXIT));
+}
+
+void slaunch_finalize(int do_sexit)
+{
+ u64 one = TXT_REGVALUE_ONE, val;
+ void __iomem *config;
+
+ if ((slaunch_get_flags() & (SL_FLAG_ACTIVE|SL_FLAG_ARCH_TXT)) !=
+ (SL_FLAG_ACTIVE | SL_FLAG_ARCH_TXT))
+ return;
+
+ config = ioremap(TXT_PRIV_CONFIG_REGS_BASE, TXT_NR_CONFIG_PAGES *
+ PAGE_SIZE);
+ if (!config) {
+ pr_emerg("Error SEXIT failed to ioremap TXT private reqs\n");
+ return;
+ }
+
+ /* Clear secrets bit for SEXIT */
+ memcpy_toio(config + TXT_CR_CMD_NO_SECRETS, &one, sizeof(one));
+ memcpy_fromio(&val, config + TXT_CR_E2STS, sizeof(val));
+
+ /* Unlock memory configurations */
+ memcpy_toio(config + TXT_CR_CMD_UNLOCK_MEM_CONFIG, &one, sizeof(one));
+ memcpy_fromio(&val, config + TXT_CR_E2STS, sizeof(val));
+
+ /* Close the TXT private register space */
+ memcpy_toio(config + TXT_CR_CMD_CLOSE_PRIVATE, &one, sizeof(one));
+ memcpy_fromio(&val, config + TXT_CR_E2STS, sizeof(val));
+
+ /*
+ * Calls to iounmap are not being done because of the state of the
+ * system this late in the kexec process. Local IRQs are disabled and
+ * iounmap causes a TLB flush which in turn causes a warning. Leaving
+ * thse mappings is not an issue since the next kernel is going to
+ * completely re-setup memory management.
+ */
+
+ /* Map public registers and do a final read fence */
+ config = ioremap(TXT_PUB_CONFIG_REGS_BASE, TXT_NR_CONFIG_PAGES *
+ PAGE_SIZE);
+ if (!config) {
+ pr_emerg("Error SEXIT failed to ioremap TXT public reqs\n");
+ return;
+ }
+
+ memcpy_fromio(&val, config + TXT_CR_E2STS, sizeof(val));
+
+ pr_emerg("TXT clear secrets bit and unlock memory complete.\n");
+
+ if (!do_sexit)
+ return;
+
+ if (smp_processor_id() != 0)
+ panic("Error TXT SEXIT must be called on CPU 0\n");
+
+ /* Disable SMX mode */
+ cr4_set_bits(X86_CR4_SMXE);
+
+ /* Do the SEXIT SMX operation */
+ smx_getsec_sexit();
+
+ pr_info("TXT SEXIT complete.\n");
+}
diff --git a/kernel/kexec_core.c b/kernel/kexec_core.c
index 68480f7..cb67bfb 100644
--- a/kernel/kexec_core.c
+++ b/kernel/kexec_core.c
@@ -39,6 +39,7 @@
#include <linux/hugetlb.h>
#include <linux/objtool.h>
#include <linux/kmsg_dump.h>
+#include <linux/slaunch.h>
#include <asm/page.h>
#include <asm/sections.h>
@@ -1178,6 +1179,9 @@ int kernel_kexec(void)
cpu_hotplug_enable();
pr_notice("Starting new kernel\n");
machine_shutdown();
+
+ /* Finalize TXT registers and do SEXIT */
+ slaunch_finalize(1);
}
kmsg_dump(KMSG_DUMP_SHUTDOWN);
--
1.8.3.1
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next prev parent reply other threads:[~2022-02-18 15:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-17 3:54 [PATCH v5 00/12] x86: Trenchboot secure dynamic launch Linux kernel support Ross Philipson
2022-02-17 3:54 ` [PATCH v5 01/12] x86/boot: Place kernel_info at a fixed offset Ross Philipson
2022-02-17 3:54 ` [PATCH v5 02/12] Documentation/x86: Secure Launch kernel documentation Ross Philipson
2022-02-17 3:54 ` [PATCH v5 03/12] x86: Secure Launch Kconfig Ross Philipson
2022-02-17 3:54 ` [PATCH v5 04/12] x86: Secure Launch main header file Ross Philipson
2022-02-17 3:54 ` [PATCH v5 05/12] x86: Add early SHA support for Secure Launch early measurements Ross Philipson
2022-02-17 3:54 ` [PATCH v5 06/12] x86: Secure Launch kernel early boot stub Ross Philipson
2022-02-17 3:54 ` [PATCH v5 07/12] x86: Secure Launch kernel late " Ross Philipson
2022-02-17 3:54 ` [PATCH v5 08/12] x86: Secure Launch SMP bringup support Ross Philipson
2022-02-17 3:54 ` Ross Philipson [this message]
2022-02-17 3:54 ` [PATCH v5 10/12] reboot: Secure Launch SEXIT support on reboot paths Ross Philipson
2022-02-17 3:54 ` [PATCH v5 11/12] x86: Secure Launch late initcall platform module Ross Philipson
2022-02-17 3:54 ` [PATCH v5 12/12] tpm: Allow locality 2 to be set when initializing the TPM for Secure Launch Ross Philipson
2022-02-23 17:45 ` [PATCH v5 00/12] x86: Trenchboot secure dynamic launch Linux kernel support Dave Hansen
2022-02-25 18:57 ` Daniel P. Smith
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