From: Baolu Lu <baolu.lu@linux.intel.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
patches@lists.linux.dev, Wei Wang <wei.w.wang@intel.com>
Subject: Re: [PATCH 7/7] iommu/vtd: Split paging_domain_compatible()
Date: Fri, 13 Jun 2025 11:15:59 +0800 [thread overview]
Message-ID: <1e71b605-1224-4de6-b816-16c1c0ca2ce6@linux.intel.com> (raw)
In-Reply-To: <20250612134701.GT543171@nvidia.com>
On 6/12/25 21:47, Jason Gunthorpe wrote:
> On Wed, Jun 11, 2025 at 12:50:11PM +0800, Baolu Lu wrote:
>
>>> When this was first done that was harder, but now I think we have
>>> enough infrastructure to do it easily..
>> Yes. I can follow up with a patch series for broad discussion if you
>> don't want to include it in this series.
> Please, I'd rather keep this as is.
>
> There is also a problem here with AMD, it turns out only its V1 page
> table can support disabling no-snoop, the v2 page table cannot and
> there is nothing like the PGSNP there.
>
> The iommufd side assumes that if a device supports coherencey then all
> paging iommu_domains support it.. Maybe a creation flag can fix that
> also?
I guess so. For the AMD case, a FORCE_COHERENCY allocation flag
indicates that the IOMMU driver should select a right page table type to
meet this requirement. This requirement will also be enforced in the
domain attaching paths, meaning it will be an incompatible failure if a
FORCE_COHERENCY domain is attached to any device that doesn't support
this feature.
Anyway, we can discuss the details when we have that code.
Thanks,
baolu
next prev parent reply other threads:[~2025-06-13 3:16 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-09 19:58 [PATCH 0/7] Reorganize Intel VT-D to be ready for iommupt Jason Gunthorpe
2025-06-09 19:58 ` [PATCH 1/7] iommu/vtd: Lift the __pa to domain_setup_first_level/intel_svm_set_dev_pasid() Jason Gunthorpe
2025-06-10 18:34 ` Jason Gunthorpe
2025-06-09 19:58 ` [PATCH 2/7] iommu/vtd: Fold domain_exit() into intel_iommu_domain_free() Jason Gunthorpe
2025-06-10 9:15 ` Wang, Wei W
2025-06-10 13:29 ` Jason Gunthorpe
2025-06-09 19:58 ` [PATCH 3/7] iommu/vtd: Do not wipe out the page table NID when devices detach Jason Gunthorpe
2025-06-10 6:41 ` Baolu Lu
2025-06-10 13:18 ` Jason Gunthorpe
2025-06-10 9:14 ` Wang, Wei W
2025-06-09 19:58 ` [PATCH 4/7] iommu/vtd: Split intel_iommu_domain_alloc_paging_flags() Jason Gunthorpe
2025-06-10 9:14 ` Wang, Wei W
2025-06-10 13:25 ` Jason Gunthorpe
2025-06-09 19:58 ` [PATCH 5/7] iommu/vtd: Create unique domain ops for each stage Jason Gunthorpe
2025-06-10 9:14 ` Wang, Wei W
2025-06-10 13:26 ` Jason Gunthorpe
2025-06-09 19:58 ` [PATCH 6/7] iommu/vtd: Split intel_iommu_enforce_cache_coherency() Jason Gunthorpe
2025-06-09 19:58 ` [PATCH 7/7] iommu/vtd: Split paging_domain_compatible() Jason Gunthorpe
2025-06-10 7:12 ` Baolu Lu
2025-06-10 23:51 ` Jason Gunthorpe
2025-06-11 4:50 ` Baolu Lu
2025-06-12 13:47 ` Jason Gunthorpe
2025-06-13 3:15 ` Baolu Lu [this message]
2025-06-12 7:18 ` [PATCH 0/7] Reorganize Intel VT-D to be ready for iommupt Joerg Roedel
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