From: Thierry Reding <thierry.reding@gmail.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: linux-tegra@vger.kernel.org, Dmitry Osipenko <digetx@gmail.com>,
iommu@lists.linux-foundation.org,
Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH 1/3] iommu/tegra-smmu: Use non-secure register for flushing
Date: Wed, 16 Oct 2019 13:50:24 +0200 [thread overview]
Message-ID: <20191016115026.1768745-1-thierry.reding@gmail.com> (raw)
From: Navneet Kumar <navneetk@nvidia.com>
Use PTB_ASID instead of SMMU_CONFIG to flush smmu.
PTB_ASID can be accessed from non-secure mode, SMMU_CONFIG cannot be.
Using SMMU_CONFIG could pose a problem when kernel doesn't have secure
mode access enabled from boot.
Signed-off-by: Navneet Kumar <navneetk@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
drivers/iommu/tegra-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index 99f85fb5a704..03e667480ec6 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -240,7 +240,7 @@ static inline void smmu_flush_tlb_group(struct tegra_smmu *smmu,
static inline void smmu_flush(struct tegra_smmu *smmu)
{
- smmu_readl(smmu, SMMU_CONFIG);
+ smmu_readl(smmu, SMMU_PTB_ASID);
}
static int tegra_smmu_alloc_asid(struct tegra_smmu *smmu, unsigned int *idp)
--
2.23.0
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next reply other threads:[~2019-10-16 11:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-16 11:50 Thierry Reding [this message]
2019-10-16 11:50 ` [PATCH 2/3] iommu/tegra-smmu: Fix client enablement order Thierry Reding
2019-10-16 11:50 ` [PATCH 3/3] iommu/tegra-smmu: Fix page tables in > 4 GiB memory Thierry Reding
2019-10-18 9:46 ` [PATCH 1/3] iommu/tegra-smmu: Use non-secure register for flushing Joerg Roedel
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