From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: iommu@lists.linux-foundation.org
Subject: [PATCH 06/12] iommu/vt-d: Warn on out-of-range invalidation address
Date: Fri, 24 Jul 2020 09:49:19 +0800 [thread overview]
Message-ID: <20200724014925.15523-7-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20200724014925.15523-1-baolu.lu@linux.intel.com>
From: Jacob Pan <jacob.jun.pan@linux.intel.com>
For guest requested IOTLB invalidation, address and mask are provided as
part of the invalidation data. VT-d HW silently ignores any address bits
below the mask. SW shall also allow such case but give warning if
address does not align with the mask. This patch relax the fault
handling from error to warning and proceed with invalidation request
with the given mask.
Fixes: 6ee1b77ba3ac0 ("iommu/vt-d: Add svm/sva invalidate function")
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
drivers/iommu/intel/iommu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 281b32b233d8..592869ce2a0f 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -5453,13 +5453,12 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, struct device *dev,
switch (BIT(cache_type)) {
case IOMMU_CACHE_INV_TYPE_IOTLB:
+ /* HW will ignore LSB bits based on address mask */
if (inv_info->granularity == IOMMU_INV_GRANU_ADDR &&
size &&
(inv_info->addr_info.addr & ((BIT(VTD_PAGE_SHIFT + size)) - 1))) {
- pr_err_ratelimited("Address out of range, 0x%llx, size order %llu\n",
+ pr_err_ratelimited("User address not aligned, 0x%llx, size order %llu\n",
inv_info->addr_info.addr, size);
- ret = -ERANGE;
- goto out_unlock;
}
/*
--
2.17.1
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next prev parent reply other threads:[~2020-07-24 1:54 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-24 1:49 [PATCH 00/12] [PULL REQUEST] iommu/vt-d: patches for v5.9 Lu Baolu
2020-07-24 1:49 ` [PATCH 01/12] iommu/vt-d: Enforce PASID devTLB field mask Lu Baolu
2020-07-24 1:49 ` [PATCH 02/12] iommu/vt-d: Remove global page support in devTLB flush Lu Baolu
2020-07-24 1:49 ` [PATCH 03/12] iommu/vt-d: Fix PASID devTLB invalidation Lu Baolu
2020-07-24 1:49 ` [PATCH 04/12] iommu/vt-d: Handle non-page aligned address Lu Baolu
2020-07-24 1:49 ` [PATCH 05/12] iommu/vt-d: Fix devTLB flush for vSVA Lu Baolu
2020-07-24 1:49 ` Lu Baolu [this message]
2020-07-24 1:49 ` [PATCH 07/12] iommu/vt-d: Disable multiple GPASID-dev bind Lu Baolu
2020-07-24 1:49 ` [PATCH 08/12] iommu/vt-d: Refactor device_to_iommu() helper Lu Baolu
2020-07-24 1:49 ` [PATCH 09/12] iommu/vt-d: Add a helper to get svm and sdev for pasid Lu Baolu
2020-07-24 1:49 ` [PATCH 10/12] iommu/vt-d: Report page request faults for guest SVA Lu Baolu
2020-07-24 1:49 ` [PATCH 11/12] iommu/vt-d: Add page response ops support Lu Baolu
2020-07-24 1:49 ` [PATCH 12/12] iommu/vt-d: Rename intel-pasid.h to pasid.h Lu Baolu
2020-07-24 8:55 ` [PATCH 00/12] [PULL REQUEST] iommu/vt-d: patches for v5.9 Joerg Roedel
2020-07-24 9:08 ` Lu Baolu
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