From: "Raj, Ashok" <ashok.raj@intel.com>
To: Alex Williamson <alex.williamson@redhat.com>
Cc: Joerg Roedel <jroedel@suse.de>,
"Jechlitschek, Christoph" <christoph.jechlitschek@intel.com>,
Sagi Grimberg <sagi@grimberg.me>,
"open list:PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
"open list:NVM EXPRESS DRIVER" <linux-nvme@lists.infradead.org>,
Jens Axboe <axboe@fb.com>,
Lalithambika Krishnakumar <lalithambika.krishnakumar@intel.com>,
iommu@lists.linux-foundation.org,
Kai-Heng Feng <kai.heng.feng@canonical.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Keith Busch <kbusch@kernel.org>, Rajat Jain <rajatja@google.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Christoph Hellwig <hch@lst.de>, Ashok Raj <ashok.raj@intel.com>
Subject: Re: [bugzilla-daemon@bugzilla.kernel.org: [Bug 209149] New: "iommu/vt-d: Enable PCI ACS for platform opt in hint" makes NVMe config space not accessible after S3]
Date: Thu, 24 Sep 2020 12:44:37 -0700 [thread overview]
Message-ID: <20200924194437.GA85997@otc-nc-03> (raw)
In-Reply-To: <20200924133938.6b93732f@x1.home>
Hi Alex
> > Apparently it also requires to disable RR, and I'm not able to confirm if
> > CML requires that as well.
> >
> > pci_quirk_disable_intel_spt_pch_acs_redir() also seems to consult the same
> > table, so i'm not sure why we need the other patch in bugzilla is required.
>
> If we're talking about the Intel bug where PCH root ports implement
> the ACS capability and control registers as dword rather than word
> registers, then how is ACS getting enabled in order to generate an ACS
> violation? The standard ACS code would write to the control register
> word at offset 6, which is still the read-only capability register on
> those devices. Thanks,
Right... Maybe we need header log to figure out what exatly is happening.
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2020-09-24 19:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-23 16:03 [bugzilla-daemon@bugzilla.kernel.org: [Bug 209149] New: "iommu/vt-d: Enable PCI ACS for platform opt in hint" makes NVMe config space not accessible after S3] Bjorn Helgaas
2020-09-23 16:19 ` Raj, Ashok
2020-09-23 19:45 ` Rajat Jain via iommu
2020-09-24 20:03 ` Raj, Ashok
2020-09-23 16:31 ` Kai-Heng Feng
2020-09-24 18:09 ` Raj, Ashok
2020-09-24 19:39 ` Alex Williamson
2020-09-24 19:44 ` Raj, Ashok [this message]
2020-09-25 6:35 ` Kai-Heng Feng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200924194437.GA85997@otc-nc-03 \
--to=ashok.raj@intel.com \
--cc=alex.williamson@redhat.com \
--cc=axboe@fb.com \
--cc=christoph.jechlitschek@intel.com \
--cc=hch@lst.de \
--cc=helgaas@kernel.org \
--cc=iommu@lists.linux-foundation.org \
--cc=jroedel@suse.de \
--cc=kai.heng.feng@canonical.com \
--cc=kbusch@kernel.org \
--cc=lalithambika.krishnakumar@intel.com \
--cc=linux-nvme@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=mika.westerberg@linux.intel.com \
--cc=rajatja@google.com \
--cc=sagi@grimberg.me \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox