From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
jsnitsel@redhat.com
Subject: Re: [PATCH v2 04/11] iommu/amd: Initial SVA support for AMD IOMMU
Date: Fri, 13 Oct 2023 12:58:22 -0300 [thread overview]
Message-ID: <20231013155822.GA282036@ziepe.ca> (raw)
In-Reply-To: <019ab268-fee3-215e-b805-cc3f19e0f634@amd.com>
On Fri, Oct 13, 2023 at 09:22:20PM +0530, Vasant Hegde wrote:
> > If you reoganize things so the notifier is always registered then you
> > don't need to have the spinlock protecting it anymore. this requires
> > putting the unregister in the domain deallocation routine.
>
> Yeah. I will put unregister in de-allocation path instead of adding another lock.
If you inspect the series I posted here (actually just get it from
github and look at it) you can see an example of how to structure all
of this to avoid all of the concerns in this thread:
https://lore.kernel.org/linux-iommu/0-v1-afbb86647bbd+5-smmuv3_newapi_p2_jgg@nvidia.com/
ttps://github.com/jgunthorpe/linux/commits/smmuv3_newapi
Feel free to take the patch introducing the new core op to your
series, it really helps alot to make this sane and clean.
Notice how little of the code that is left is actually SVA specific.
When structured properly the majority of the work is to enable PASID
support. SVA is just a small bit on top to manage the mmu_notifier.
Jason
next prev parent reply other threads:[~2023-10-13 15:58 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-11 12:10 [PATCH v2 00/11] iommu/amd: SVA Support (Part 4) - SVA and IOPF Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 01/11] iommu/amd: Rename amd_iommu_v2_supported() as amd_iommu_sva_supported() Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 02/11] iommu/amd: Do not override PASID entry in GCR3 table Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 03/11] iommu/amd: Add support for enabling/disabling IOMMU features Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 04/11] iommu/amd: Initial SVA support for AMD IOMMU Vasant Hegde
2023-09-12 16:47 ` Jason Gunthorpe
2023-09-15 8:50 ` Vasant Hegde
2023-09-18 12:53 ` Jason Gunthorpe
2023-10-13 15:52 ` Vasant Hegde
2023-10-13 15:58 ` Jason Gunthorpe [this message]
2023-09-11 12:10 ` [PATCH v2 05/11] iommu/amd: Add support to enable/disable PASID feature Vasant Hegde
2023-09-12 16:57 ` Jason Gunthorpe
2023-09-15 8:57 ` Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 06/11] iommu/amd: Move PPR-related functions into ppr.c Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 07/11] iommu/amd: Define per-IOMMU iopf_queue Vasant Hegde
2023-09-12 16:59 ` Jason Gunthorpe
2023-09-15 13:48 ` Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 08/11] iommu/amd: Add support for page response Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 09/11] iommu/amd: Add support for add/remove device for IOPF Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 10/11] iommu/amd: Add IO page fault notifier handler Vasant Hegde
2023-09-12 18:46 ` Jason Gunthorpe
2023-09-13 4:19 ` Baolu Lu
2023-09-15 8:15 ` Vasant Hegde
2023-09-11 12:10 ` [PATCH v2 11/11] iommu/amd: Introduce logic to enable/disable IOPF Vasant Hegde
2023-09-12 16:32 ` Jason Gunthorpe
2023-09-15 8:26 ` Vasant Hegde
2023-09-18 12:45 ` Jason Gunthorpe
2023-10-10 14:53 ` Vasant Hegde
2023-10-10 15:04 ` Jason Gunthorpe
2023-09-12 18:48 ` [PATCH v2 00/11] iommu/amd: SVA Support (Part 4) - SVA and IOPF Jason Gunthorpe
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