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From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
	<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
	Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 03/12] iommu/amd: Introduce per device DTE update function
Date: Mon, 16 Oct 2023 10:43:42 +0000	[thread overview]
Message-ID: <20231016104351.5749-4-vasant.hegde@amd.com> (raw)
In-Reply-To: <20231016104351.5749-1-vasant.hegde@amd.com>

Consolidate per device update and flush logic into separate function.
Also make it as global function as it will be used in subsequent series
to update the DTE.

Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
 drivers/iommu/amd/amd_iommu.h |  1 +
 drivers/iommu/amd/iommu.c     | 40 +++++++++++++++++++++--------------
 2 files changed, 25 insertions(+), 16 deletions(-)

diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 0df0cb03329c..e3c7b99977c5 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -65,6 +65,7 @@ int amd_iommu_clear_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid);
 void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
 void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
 void amd_iommu_domain_update(struct protection_domain *domain);
+void amd_iommu_dev_update_dte(struct iommu_dev_data *dev_data, bool set);
 void amd_iommu_domain_flush_complete(struct protection_domain *domain);
 void amd_iommu_domain_flush_pages(struct protection_domain *pdom,
 				  u64 address, size_t size);
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 8e5d1dcc50dc..39acf98e45dd 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -79,6 +79,7 @@ static void detach_device(struct device *dev);
 
 static void set_dte_entry(struct amd_iommu *iommu,
 			  struct iommu_dev_data *dev_data);
+static void clear_dte_entry(struct amd_iommu *iommu, u16 devid);
 
 /****************************************************************************
  *
@@ -1679,6 +1680,24 @@ static void domain_flush_np_cache(struct protection_domain *domain,
 }
 
 
+/* Update and flush DTE for the given device */
+void amd_iommu_dev_update_dte(struct iommu_dev_data *dev_data, bool set)
+{
+	struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev);
+
+	if (!iommu)
+		return;
+
+	if (set)
+		set_dte_entry(iommu, dev_data);
+	else
+		clear_dte_entry(iommu, dev_data->devid);
+
+	clone_aliases(iommu, dev_data->dev);
+
+	device_flush_dte(dev_data);
+}
+
 /*
  * This function flushes the DTEs for all devices in domain
  */
@@ -1804,7 +1823,6 @@ static void free_gcr3_tbl_level2(u64 *tbl)
 static void free_gcr3_table(struct iommu_dev_data *dev_data)
 {
 	struct gcr3_tbl_info *gcr3_info = &dev_data->gcr3_info;
-	struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev);
 
 	if (gcr3_info->glx == 2)
 		free_gcr3_tbl_level2(gcr3_info->gcr3_tbl);
@@ -1815,9 +1833,7 @@ static void free_gcr3_table(struct iommu_dev_data *dev_data)
 
 	gcr3_info->glx = 0;
 
-	set_dte_entry(iommu, dev_data);
-	clone_aliases(iommu, dev_data->dev);
-	device_flush_dte(dev_data);
+	amd_iommu_dev_update_dte(dev_data, true);
 
 	free_page((unsigned long)gcr3_info->gcr3_tbl);
 	gcr3_info->gcr3_tbl = NULL;
@@ -1842,7 +1858,6 @@ static int get_gcr3_levels(int pasids)
 static int setup_gcr3_table(struct iommu_dev_data *dev_data, int pasids)
 {
 	struct gcr3_tbl_info *gcr3_info = &dev_data->gcr3_info;
-	struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev);
 	int levels = get_gcr3_levels(pasids);
 
 	if (levels > amd_iommu_max_glx_val)
@@ -1858,9 +1873,7 @@ static int setup_gcr3_table(struct iommu_dev_data *dev_data, int pasids)
 
 	gcr3_info->glx = levels;
 
-	set_dte_entry(iommu, dev_data);
-	clone_aliases(iommu, dev_data->dev);
-	device_flush_dte(dev_data);
+	amd_iommu_dev_update_dte(dev_data, true);
 
 	return 0;
 }
@@ -2138,10 +2151,7 @@ static int do_attach(struct iommu_dev_data *dev_data,
 	}
 
 	/* Update device table */
-	set_dte_entry(iommu, dev_data);
-	clone_aliases(iommu, dev_data->dev);
-
-	device_flush_dte(dev_data);
+	amd_iommu_dev_update_dte(dev_data, true);
 
 	return ret;
 }
@@ -2164,11 +2174,9 @@ static void do_detach(struct iommu_dev_data *dev_data)
 	/* Update data structures */
 	dev_data->domain = NULL;
 	list_del(&dev_data->list);
-	clear_dte_entry(iommu, dev_data->devid);
-	clone_aliases(iommu, dev_data->dev);
 
-	/* Flush the DTE entry */
-	device_flush_dte(dev_data);
+	/* Clear DTE and flush the entry */
+	amd_iommu_dev_update_dte(dev_data, false);
 
 	/* Flush IOTLB and wait for the flushes to finish */
 	amd_iommu_domain_flush_all(domain);
-- 
2.31.1


  parent reply	other threads:[~2023-10-16 10:45 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-16 10:43 [PATCH v3 00/12] iommu/amd: SVA Support (Part 4) - SVA and IOPF Vasant Hegde
2023-10-16 10:43 ` [PATCH v3 01/12] iommu/amd: Rename amd_iommu_v2_supported() as amd_iommu_pasid_supported() Vasant Hegde
2023-11-06 17:50   ` Jason Gunthorpe
2023-10-16 10:43 ` [PATCH v3 02/12] iommu/amd: Do not override PASID entry in GCR3 table Vasant Hegde
2023-11-06 17:51   ` Jason Gunthorpe
2023-11-07  6:26     ` Vasant Hegde
2023-11-07 13:34       ` Jason Gunthorpe
2023-10-16 10:43 ` Vasant Hegde [this message]
2023-11-06 17:54   ` [PATCH v3 03/12] iommu/amd: Introduce per device DTE update function Jason Gunthorpe
2023-11-07  6:47     ` Vasant Hegde
2023-11-07 13:36       ` Jason Gunthorpe
2023-10-16 10:43 ` [PATCH v3 04/12] iommu/amd: Add support for enabling/disabling IOMMU features Vasant Hegde
2023-11-06 17:55   ` Jason Gunthorpe
2023-10-16 10:43 ` [PATCH v3 05/12] iommu/amd: Initial SVA support for AMD IOMMU Vasant Hegde
2023-11-06 23:18   ` Jason Gunthorpe
2023-12-20 11:00     ` Vasant Hegde
2023-10-16 10:43 ` [PATCH v3 06/12] iommu/amd: Add support to enable/disable PASID feature Vasant Hegde
2023-10-16 10:43 ` [PATCH v3 07/12] iommu/amd: Move PPR-related functions into ppr.c Vasant Hegde
2023-10-16 10:43 ` [PATCH v3 08/12] iommu/amd: Define per-IOMMU iopf_queue Vasant Hegde
2023-10-16 10:43 ` [PATCH v3 09/12] iommu/amd: Add support for page response Vasant Hegde
2023-10-16 10:43 ` [PATCH v3 10/12] iommu/amd: Add support for add/remove device for IOPF Vasant Hegde
2023-10-16 10:43 ` [PATCH v3 11/12] iommu/amd: Add IO page fault notifier handler Vasant Hegde
2023-11-06 23:20   ` Jason Gunthorpe
2023-11-07  6:42     ` Vasant Hegde
2023-11-07 13:35       ` Jason Gunthorpe
2023-10-16 10:43 ` [PATCH v3 12/12] iommu/amd: Introduce logic to enable/disable IOPF Vasant Hegde

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