From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v4 11/14] iommu/amd: Add GCR3 [un]initialization function
Date: Thu, 21 Dec 2023 11:15:55 +0000 [thread overview]
Message-ID: <20231221111558.64652-12-vasant.hegde@amd.com> (raw)
In-Reply-To: <20231221111558.64652-1-vasant.hegde@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
These functions are used in PASID to device bind path. In this path
it checks whether device GCR3 table is setup or not. If not it will
setup GCR3 table.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 3 +++
drivers/iommu/amd/iommu.c | 44 +++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index aed512c10052..7bc6d530c9a6 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -44,7 +44,10 @@ extern int amd_iommu_guest_ir;
extern enum io_pgtable_fmt amd_iommu_pgtable;
extern int amd_iommu_gpt_level;
+/* SVA/PASID */
bool amd_iommu_pasid_supported(void);
+int amd_iommu_gcr3_init(struct iommu_dev_data *dev_data, ioasid_t pasids);
+void amd_iommu_gcr3_uninit(struct iommu_dev_data *dev_data);
/* IOPF */
int amd_iommu_iopf_init(struct amd_iommu *iommu);
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index ec30cee33f3b..12ac6968c136 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -93,6 +93,11 @@ static inline bool pdom_is_v2_pgtbl_mode(struct protection_domain *pdom)
return (pdom && (pdom->pd_mode == PD_MODE_V2));
}
+static inline bool pdom_is_in_pt_mode(struct protection_domain *pdom)
+{
+ return (pdom->domain.type == IOMMU_DOMAIN_IDENTITY);
+}
+
/*
* Allocate per device domain ID when using V2 page table
*/
@@ -1862,6 +1867,45 @@ int amd_iommu_clear_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid)
return ret;
}
+int amd_iommu_gcr3_init(struct iommu_dev_data *dev_data, ioasid_t pasids)
+{
+ struct protection_domain *pdom = dev_data->domain;
+ int ret = 0;
+
+ lockdep_assert_held(&dev_data->lock);
+
+ /*
+ * We cannot support PASID w/ existing v1 page table in the same domain
+ * since it will be nested. However, existing domain w/ v2 page table
+ * can be used for PASID.
+ */
+ if (!pdom_is_v2_pgtbl_mode(pdom) && !pdom_is_in_pt_mode(pdom))
+ return -EOPNOTSUPP;
+
+ /* Allocate GCR3 table */
+ if (pdom_is_in_pt_mode(pdom) && dev_data->gcr3_info.gcr3_tbl == NULL) {
+ ret = setup_gcr3_table(dev_data, pasids);
+
+ /* Update device table */
+ amd_iommu_dev_update_dte(dev_data, true);
+ }
+
+ return ret;
+}
+
+void amd_iommu_gcr3_uninit(struct iommu_dev_data *dev_data)
+{
+ lockdep_assert_held(&dev_data->lock);
+
+ /* Free GCR3 table */
+ if (pdom_is_in_pt_mode(dev_data->domain)) {
+ free_gcr3_table(dev_data);
+
+ /* Update device table */
+ amd_iommu_dev_update_dte(dev_data, true);
+ }
+}
+
static void set_dte_entry(struct amd_iommu *iommu,
struct iommu_dev_data *dev_data)
{
--
2.31.1
next prev parent reply other threads:[~2023-12-21 11:19 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-21 11:15 [PATCH v4 00/14] iommu/amd: SVA Support (Part 4) - SVA and IOPF Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 01/14] iommu/amd: Rename amd_iommu_v2_supported() as amd_iommu_pasid_supported() Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 02/14] iommu/amd: Introduce per device DTE update function Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 03/14] iommu/amd: Add support for enabling/disabling IOMMU features Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 04/14] iommu/amd: Move PPR-related functions into ppr.c Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 05/14] iommu/amd: Fix PPR interrupt processing logic Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 06/14] iommu/amd: Define per-IOMMU iopf_queue Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 07/14] iommu/amd: Add support for page response Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 08/14] iommu/amd: Add support for add/remove device for IOPF Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 09/14] iommu/amd: Add IO page fault notifier handler Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 10/14] iommu/amd: Introduce logic to enable/disable IOPF Vasant Hegde
2023-12-21 11:15 ` Vasant Hegde [this message]
2023-12-21 11:15 ` [PATCH v4 12/14] iommu/amd: Initial SVA support for AMD IOMMU Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 13/14] iommu: Add ops->domain_alloc_sva() Vasant Hegde
2024-01-08 6:46 ` Tina Zhang
2024-01-09 17:50 ` Jason Gunthorpe
2024-01-11 5:18 ` Vasant Hegde
2023-12-21 11:15 ` [PATCH v4 14/14] iommu/amd: Add SVA domain support Vasant Hegde
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